LT1976/LT1976B
16
1976bfg
APPLICATIO S I FOR ATIO
WUUU
1. Choose a value in microhenries from the graph of
maximum load current. Choosing a small inductor with
lighter loads may result in discontinuous mode of
operation, but the LT1976 is designed to work well in
either mode.
Table 4. Inductor Selection Criteria
VENDOR/
PART NUMBER VALUE (μH) I
RMS
(A) DCR (Ω) HEIGHT (mm)
Coiltronics
UP2B-150 15 2.4 0.041 6
UP2B-330 33 1.7 0.062 6
UP2B-470 47 1.4 0.139 6
UP2B-680 68 1.2 0.179 6
UP2B-101 100 0.95 0.271 6
UP3B-150 15 3.9 0.032 6.8
UP3B-330 33 2.4 0.069 6.8
UP3B-470 47 1.9 0.101 6.8
UP3B-680 68 1.6 0.156 6.8
UP3B-101 100 1.4 0.205 6.8
Sumida
CDRH8D28-150M 15 2.2 0.053 3
CDRH124-150M 15 3.2 0.05 4.5
CDRH127-150M 15 4.5 0.02 8
CDRH8D28-330M 33 1.4 0.122 3
CDRH124-330M 33 2.7 0.97 4.5
CDRH127-330M 33 3.0 0.048 8
CDRH8D28-470M 47 1.25 0.150 3
CDRH125-470M 47 1.8 0.058 6
CDRH127-470M 47 2.5 0.076 8
CDRH124-680M 68 1.5 0.228 4.5
CDRH127-680M 68 2.1 0.1 8
CDRH124-101M 100 1.2 0.30 4.5
CDRH127-101M 100 1.7 0.17 8
Coilcraft
DT3308P-153 15 2.0 0.1 3
DT3308P-333 33 1.4 0.3 3
DT3308P-473 47 1 0.47 3
Assume that the average inductor current is equal to
load current and decide whether or not the inductor
must withstand continuous fault conditions. If maxi-
mum load current is 0.5A, for instance, a 0.5A inductor
may not survive a continuous 2A overload condition.
For applications with a duty cycle above 50%, the
inductor value should be chosen to obtain an inductor
ripple current of less than 40% of the peak switch
current.
2. Calculate peak inductor current at full load current to
ensure that the inductor will not saturate. Peak current
can be significantly higher than output current, especially
with smaller inductors and lighter loads, so don’t omit
this step. Powdered iron cores are forgiving because they
saturate softly, whereas ferrite cores saturate abruptly.
Other core materials fall somewhere in between. The
following formula assumes continuous mode of opera-
tion, but it errs only slightly on the high side for discon-
tinuous mode, so it can be used for all conditions.
II
VVV
fLV
PEAK OUT
OUT IN OUT
IN
=+
()
()()( )
2
V
IN
= maximum input voltage
f = switching frequency, 200kHz
3. Decide if the design can tolerate an “open” core geom-
etry like a rod or barrel, which have high magnetic field
radiation, or whether it needs a closed core like a toroid
to prevent EMI problems. This is a tough decision
because the rods or barrels are temptingly cheap and
small and there are no helpful guidelines to calculate
when the magnetic field radiation will be a problem.
4. After making an initial choice, consider the secondary
things like output voltage ripple, second sourcing, etc.
Use the experts in the Linear Technology’s applications
department if you feel uncertain about the final choice.
They have experience with a wide range of inductor
types and can tell you about the latest developments in
low profile, surface mounting, etc.
LT1976/LT1976B
17
1976bfg
APPLICATIO S I FOR ATIO
WUUU
Short-Circuit Considerations
The LT1976 is a current mode controller. It uses the V
C
node voltage as an input to a current comparator which
turns off the output switch on a cycle-by-cycle basis as
this peak current is reached. The internal clamp on the V
C
node, nominally 2.2V, then acts as an output switch peak
current limit. This action becomes the switch current limit
specification. The maximum available output power is
then determined by the switch current limit.
A potential controllability prod}m could occur under short-
circuit conditions. If the power supply output is short
circuited, the feedback amplifier responds to the low
output voltage by raising the control voltage, V
C
, to its
peak current limit value. Ideally, the output switch would
be turned on, and then turned off as its current exceeded
the value indicated by V
C
. However, there is finite response
time involved in both the current comparator and turn-off
of the output switch. These result in a minimum on time
t
ON(MIN).
When combined with the large ratio of V
IN
to
(V
F
+ I • R), the diode forward voltage plus inductor I • R
voltage drop, the potential exists for a loss of control.
Expressed mathematically the requirement to maintain
control is:
ft
VIR
V
ON
F
IN
+
where:
f = switching frequency
t
ON
= switch on time
V
F
= diode forward voltage
V
IN
= Input voltage
I • R = inductor I • R voltage drop
If this condition is not observed, the current will not be
limited at I
PK
but will cycle-by-cycle ratchet up to some
higher value. Using the nominal LT1976 clock frequency
of 200kHz, a V
IN
of 40V and a (V
F
+ I • R) of say 0.7V, the
maximum t
ON
to maintain control would be approximately
90ns, an unacceptably short time.
The solution to this dilemma is to slow down the oscillator
to allow the current in the inductor to drop to a sufficiently
low value such that the current doesn’t continue to ratchet
higher. When the FB pin voltage is abnormally low thereby
indicating some sort of short-circuit condition, the oscil-
lator frequency will be reduced. Oscillator frequency is
reduced by a factor of 4 when the FB pin voltage is below
0.4V and increases linearly to its typical value of 200kHz at
a FB voltage of 0.95V (see Typical Performance Character-
istics). In addition, if the current in the switch exceeds 1.5
• I
PK
current demanded by the V
C
pin, the LT1976 will skip
the next on cycle effectively reducing the oscillator fre-
quency by a factor of 2. These oscillator frequency reduc-
tions during short-circuit conditions allow the LT1976 to
maintain current control.
SOFT-START
For applications where [V
IN
/(V
OUT
+ V
F
)] ratios > 10 or
large input surge currents can’t be tolerated, the LT1976
soft-start feature should be used to control the output
capacitor charge rate during start-up, or during recovery
from an output short circuit thereby adding additional
control over peak inductor current. The soft-start function
limits the switch current via the V
C
pin to maintain a
constant voltage ramp rate (dV/dt) at the output capacitor.
A capacitor (C1 in Figure 2) from the C
SS
pin to the
regulated output voltage determines the output voltage
ramp rate. When the current through the C
SS
capacitor
exceeds the C
SS
threshold (I
CSS
), the voltage ramp of the
output capacitor is limited by reducing the V
C
pin voltage.
The C
SS
threshold is proportional to the FB voltage (see
Typical Performance Characteristics) and is defeated for
FB voltages greater than 0.9V (typical). The output dV/dt
can be approximated by:
dV
dt
I
C
CSS
SS
=
but actual values will vary due to start-up load conditions,
compensation values and output capacitor selection.
LT1976/LT1976B
18
1976bfg
APPLICATIO S I FOR ATIO
WUUU
Burst Mode OPERATION (LT1976 ONLY)
To enhance efficiency at light loads, the LT1976 automati-
cally switches to Burst Mode operation which keeps the
output capacitor charged to the proper voltage while mini-
mizing the input quiescent current. During Burst Mode
operation, the LT1976 delivers short bursts of current to
the output capacitor followed by sleep periods where the
output power is delivered to the load by the output capaci-
tor. In addition, V
IN
and BIAS quiescent currents are re-
duced to typically 45μA and 125μA respectively during the
sleep time. As the load current decreases towards a no
load condition, the percentage of time that the LT1976
operates in sleep mode increases and the average input
current is greatly reduced resulting in higher efficiency.
The minimum average input current depends on the V
IN
to
V
OUT
ratio, V
C
frequency compensation, feedback divider
network and Schottky diode leakage. It can be approxi-
mated by the following equation:
III
V
V
III
IN AVG VINS SHDN
OUT
IN
BIASS FB S
()
≅+ +
++
()
()
η
where
I
VINS
= input pin current in sleep mode
V
OUT
= output voltage
V
IN
=
input voltage
I
BIASS
= BIAS pin current in sleep mode
I
FB
= feedback network current
I
S
= catch diode reverse leakage at V
OUT
η = low current efficiency (non Burst Mode operation)
Example: For V
OUT
= 3.3V, V
IN
= 12V
IAA
AA
IN AVG()
.
.
+μ+
μ+ μ+
45 5
33
12
125 12 5 0
..
.
5
08
45 5 47 97
μ
()
()
+μ
A
AA A A
During the sleep portion of the Burst Mode cycle, the V
C
pin voltage is held just below the level needed for normal
operation to improve transient response. See the Typical
Performance Characteristics section for burst and tran-
sient response waveforms.
If a no load condition can be anticipated, the supply current
can be further reduced by cycling the SHDN pin at a rate
higher than the natural no load burst frequency. Figure 6
shows Burst Mode operation with the SHDN pin. V
OUT
burst ripple is maintained while the average supply current
Figure 6. Burst Mode with Shutdown Pin
V
OUT
50mV/DIV
V
SHDN
2V/DIV
I
SW
500mA/DIV
V
IN
= 12V TIME (50ms/DIV) 1976 G16
V
OUT
= 3.3V
I
Q
= 15μA
Figure 5. I
Q
vs V
IN
INPUT VOLTAGE (V)
0
0
SUPPLY CURRENT (μA)
50
100
10
20
30 40
1976 F05
50
150
25
75
125
60
V
OUT
= 3.3V
T
A
= 25°C
Figure 4. V
OUT
dV/dt
V
OUT
0.5V/DIV
C
SS
= GND
C
SS
= 0.1μFC
SS
= 0.1μF
C
OUT
= 47μF TIME (1ms/DIV) 1976 F04
I
LOAD
= 200mA
V
IN
= 12V

LT1976EFE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 1.5A, 200kHz uP HV Step-down Converter
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union