13
LTC1703
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is limited to 10%. The maximum duty cycle limit increases
linearly between 1V and 2.5V, reaching its final value of
90% when RUN/SS is above 2.5V. Somewhere before this
point, the feedback amplifier will assume control of the
loop and the output will come into regulation. When RUN/
SS rises to 0.5V below V
CC
, the MIN feedback comparator
is enabled, and the LTC1703 is in full operation.
CURRENT LIMIT
The LTC1703 includes an onboard current limit circuit that
limits the maximum output current to a user-programmed
level. It works by sensing the voltage drop across QB
during the time that QB is on and comparing that voltage
to a user-programmed voltage at I
MAX
. Since QB looks like
a low value resistor during its on-time, the voltage drop
across it is proportional to the current flowing in it. In a
buck converter, the average current in the inductor is equal
to the output current. This current also flows through QB
during its on-time. Thus, by watching the voltage across
QB, the LTC1703 can monitor the output current.
Any time QB is on and the current flowing to the output is
reasonably large, the SW node at the drain of QB will be
somewhat negative with respect to PGND. The LTC1703
senses this voltage and inverts it to allow it to compare the
sensed voltage with a positive voltage at the I
MAX
pin. The
I
MAX
pin includes a trimmed 10µA pull-up, enabling the
user to set the voltage at I
MAX
with a single resistor, R
IMAX
,
to ground. The LTC1703 compares the two inputs and
begins limiting the output current when the magnitude of
the negative voltage at the SW pin is greater than the
voltage at I
MAX
.
The current limit detector is connected to an internal g
m
amplifier that pulls a current from the RUN/SS pin propor-
tional to the difference in voltage magnitudes between the
SW and I
MAX
pins. This current begins to discharge the
soft-start capacitor at RUN/SS, reducing the duty cycle
and controlling the output voltage until the output current
drops below the limit. The soft-start capacitor needs to
move a fair amount before it has any effect on the duty
cycle, adding a delay until the current limit takes effect
(Figure 4). This allows the LTC1703 to experience brief
overload conditions without affecting the output voltage
regulation. The delay also acts as a pole in the current limit
loop to enhance loop stability. Larger overloads cause the
soft-start capacitor to pull down quickly, protecting the
output components from damage. The current limit g
m
amplifier includes a clamp to prevent it from pulling RUN/
SS below 0.5V and shutting off the device.
Power MOSFET R
DS(ON)
varies from MOSFET to MOSFET,
limiting the accuracy obtainable from the LTC1703 current
limit loop. Additionally, ringing on the SW node due to
parasitics can add to the apparent current, causing the
loop to engage early. The LTC1703 current limit is
designed primarily as a disaster prevention, “no blow up”
circuit, and is not useful as a precision current regulator.
It should typically be set around 50% above the maximum
expected normal output current to prevent component
tolerances from encroaching on the normal current range.
See the Current Limit Programming section for advice on
choosing a value for R
IMAX
.
DISCONTINUOUS/Burst Mode OPERATION
Theory of operation
The LTC1703 switching logic has three modes of opera-
tion. Under heavy loads, it operates as a fully synchro-
nous, continuous conduction switching regulator. In this
mode of operation (“continuous” mode), the current in the
inductor flows in the positive direction (toward the output)
during the entire switching cycle, constantly supplying
current to the load. In this mode, the synchronous switch
(QB) is on whenever QT is off, so the current always flows
through a low impedance switch, minimizing voltage drop
and power loss. This is the most efficient mode of opera-
tion at heavy loads, where the resistive losses in the power
devices are the dominant loss term.
Continuous mode works efficiently when the load current
is greater than half of the ripple current in the inductor. In
a buck converter like the LTC1703, the average current in
the inductor (averaged over one switching cycle) is equal
to the load current. The ripple current is the difference
between the maximum and the minimum current during a
switching cycle (see Figure 5a). The ripple current
depends on inductor value, clock frequency and output
voltage, but is constant regardless of load as long as the
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LTC1703
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LTC1703 remains in continuous mode. See the Inductor
Selection section for a detailed description of ripple
current.
As the output load current decreases in continuous mode,
the average current in the inductor will reach a point where
it drops below half the ripple current. At this point, the
current in the inductor will reverse during a portion of the
switching cycle, or begin to flow from the output back to
the input. This does not adversely affect regulation, but
does cause additional losses as a portion of the inductor
current flows back and forth through the resistive power
switches, giving away a little more power each time and
lowering the efficiency. There are some benefits to allow-
ing this reverse current flow: the circuit will maintain
regulation even if the load current drops below zero (the
load supplies current to the LTC1703) and the output
ripple voltage and frequency remain constant at all loads,
easing filtering requirements. Circuits that take advantage
of this behavior can force the LTC1703 to operate in
continuous mode at all loads by tying the FCB (Force
Continuous Bar) pin to ground.
Discontinuous Mode
To minimize the efficiency loss due to reverse current flow
at light loads, the LTC1703 switches to a second mode of
operation: discontinuous mode (Figure 5b). In discontinu-
ous mode, the LTC1703 detects when the inductor current
approaches zero and turns off QB for the remainder of the
switch cycle. During this time, the voltage at the SW pin
will float about V
OUT
, the voltage across the inductor will
be zero, and the inductor current remains zero until the
next switching cycle begins and QT turns on again. This
prevents current from flowing backwards in QB, eliminat-
ing that power loss term. It also reduces the ripple current
in the inductor as the output current approaches zero.
The LTC1703 detects that the inductor current has reached
zero by monitoring the voltage at the SW pin while QB is
on. Since QB acts like a resistor, SW should ideally be right
at 0V when the inductor current reaches zero. In reality, the
SW node will ring to some degree immediately after it is
switched to ground by QB, causing some uncertainty as to
the actual moment the average current in QB goes to zero.
The LTC1703 minimizes this effect by ignoring the SW
node for a fixed 50ns after QB turns on when the ringing
Figure 5a. Continuous Mode
Figure 5b. Discontinuous Mode
is most severe, and by including a few millivolts offset in
the comparator that monitors the SW node. Despite these
precautions, some combinations of inductor and layout
parasitics can cause the LTC1703 to enter discontinuous
mode erratically. In many cases, the time that QB turns off
will correspond to a peak in the ringing waveform at the
SW pin (Figure 6). This erratic operation isn’t pretty, but
retains much of the efficiency benefit of discontinuous
mode and maintains regulation at all times.
TIME
I
RIPPLE
I
AVERAGE
INDUCTOR CURRENT
1703 F05a
TIME
I
RIPPLE
I
AVERAGE
INDUCTOR CURRENT
1703 F05b
Figure 6. Ringing at SW Causes Discontinuous
Comparator to Trip Early
TIME
50ns
BLANK
TIME
0V
0V
5V
DISCONTINUOUS
COMPARATOR
TURNS OFF BG
V
SW
V
BG
1703 F06
TIME
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Burst Mode Operation
Discontinuous mode removes a loss term due to resistive
drop in QB, but the LTC1703 is still switching QT and QB
on and off once a cycle. Each time an external MOSFET is
turned on, the internal driver must charge its gate to V
CC
.
Each time it is turned off, that charge is lost to ground. At
the high switching frequencies that the LTC1703 operates
at, the charge lost to the gates can add up to tens of
milliamps from V
CC
. As the load current continues to drop,
this quickly become the dominant power loss term, reduc-
ing efficiency once again.
Once again, the LTC1703 switches to a new mode to
minimize efficiency loss: Burst Mode operation. As the
circuit goes deeper and deeper into discontinuous mode,
the total time QT and QB are on reduces. However, the ratio
of the time that QT is on to the time that QB is on must
remain constant for the output to stay in regulation. An
internal timer circuit forces QT to stay on for at least 10%
of a normal switching cycle. When the load drops to the
point that the output requires less than 10% on-time at QT,
the output voltage will begin to rise. The LTC1703 senses
this rise and shuts both QT and QB off completely, skip-
ping several switching cycles until the output falls back
into range. It then resumes switching in discontinuous
mode with QT at 10% duty cycle and the burst sequence
repeats. The total deviation from the regulated output is
within the 1.5% regulation tolerance of the LTC1703.
In Burst Mode operation, both resistive loss and switching
loss are minimized while keeping the output in regulation.
The ripple current will be set by the 10% QT on-time and
the input supply voltage and is the lowest of all three
operating modes. As the load current falls to zero in Burst
Mode operation, the most significant loss term becomes
the 3mA quiescent current drawn by each side of the
LTC1703—usually much less than the minimum load
current in a typical low voltage logic system. Burst Mode
operation maximizes efficiency at low load currents, but
can cause low frequency ripple in the output voltage as the
cycle-skipping circuitry switches on and off.
FCB Pin
In some circumstances, it is desirable to control or disable
discontinuous and Burst Mode operations. The FCB (Force
Continuous Bar) pin allows the user to do this. When the
FCB pin is high, the LTC1703 is allowed to enter discon-
tinuous and Burst Mode operations at either side as
required. If FCB is taken low, discontinuous and Burst
Mode operations are disabled and both sides of the
LTC1703 run in continuous mode regardless of load. This
does not affect output regulation but does reduce effi-
ciency at low output currents. The FCB pin threshold is
specified at 0.8V ±50mV, and includes 20mV of hyster-
esis, allowing it to be used as a precision small-signal
comparator.
Paralleling Outputs
Synchronous regulators (like the LTC1703) are known for
their bullheadedness when their outputs are paralleled
with other regulators. In particular, a synchronous regu-
lator paralleled with another regulator whose output is
slightly higher (perhaps just by millivolts) will happily sink
amps of current attempting to pull its own output back
down to what it thinks is the right value.
The LTC1703 discontinuous mode allows it to be paral-
leled with another regulator without fighting. A typical
system might use the LTC1703 as a primary regulator and
a small LDO as a backup regulator to keep SRAM alive
when the main power is off. When the LTC1703 is shut
down (by pulling RUN/SS to ground), both QT and QB turn
off and the output goes into a high impedance state,
allowing the smaller regulator to support the output volt-
age. However, if the LTC1703 is powered back up in
continuous mode, it will begin a soft-start cycle with a low
duty cycle, pulling the output down and corrupting the
data stored in SRAM. The solution is to tie FCB high,
allowing the device to start in discontinuous mode. Any
reverse current flow in QB will trip the discontinuous mode
circuitry, preventing the LTC1703 from pulling down the
output.
OVERVOLTAGE FAULT
The LTC1703 includes a single overvoltage fault flag for
both channels: FAULT. FAULT is an open-drain output
with an internal 10µA pull-up. If either FB pin rises more
than 15% above the nominal 800mV value for more than
25µs, the overvoltage comparator will trip, setting an
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LTC1703IG#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2x 550kHz Sync 2-PhSw Reg Cntr w/ 5-B VI
Lifecycle:
New from this manufacturer.
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