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a
AD7302
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703 © Analog Devices, Inc., 1997
2.7 V to 5.5 V, Parallel Input
Dual Voltage Output 8-Bit DAC
FUNCTIONAL BLOCK DIAGRAM
POWER ON
RESET
CS
WR
D0
REFIN
V
DD
AD7302
V
OUT
A
DGND
D7
AGND
A/B
CLR
LDAC
PD
I/V
V
OUT
B
MUX
÷2
INPUT
REGISTER
DAC
REGISTER
I DAC A
DAC
REGISTER
I DAC B
I/V
INPUT
REGISTER
CONTROL
LOGIC
FEATURES
Two 8-Bit DACs In One Package
20-Lead DIP/SOIC/TSSOP Package
+2.7 V to +5.5 V Operation
Internal and External Reference Capability
DAC Power-Down Function
Parallel Interface
On-Chip Output Buffer
Rail-to-Rail Operation
Low Power Operation 3 mA max @ 3.3 V
Power-Down to 1 mA max @ 258C
APPLICATIONS
Portable Battery Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
GENERAL DESCRIPTION
The AD7302 is a dual, 8-bit voltage out DAC that operates
from a single +2.7 V to +5.5 V supply. Its on-chip precision
output buffers allow the DAC outputs to swing rail to rail. The
AD7302 has a parallel microprocessor and DSP-compatible
interface with high speed registers and double buffered interface
logic. Data is loaded to the registers on the rising edge of CS or
WR and the A/B pin selects either DAC A or DAC B.
Reference selection for AD7302 can be either an internal
reference derived from the V
DD
or an external reference applied
at the REFIN pin. Both DACs can be simultaneously updated
using the asynchronous LDAC input and can be cleared by
using the asynchronous CLR input.
The low power consumption of this part makes it ideally suited
to portable battery operated equipment. The power consump-
tion is less than 10 mW at 3.3 V, reducing to 3 µW in power-
down mode.
The AD7302 is available in a 20-pin plastic dual-in-line package,
20-lead SOIC and a 20-lead TSSOP package.
PRODUCT HIGHLIGHTS
1.␣ Low Power, Single Supply Operation. This part operates
from a single +2.7 V to +5.5 V supply and typically consumes
15 mW at 5 V, making it ideal for battery powered applications.
2.␣ The on-chip output buffer amplifiers allow the outputs of the
DACs to swing rail to rail with a settling time of typically 1.2 µs.
3.␣ Internal or external reference capability.
4.␣ High speed parallel interface.
5. Power-Down Capability. When powered down the DAC
consumes less than 1 µA at 25°C.
6. Packaged in 20-lead DIP, SOIC and TSSOP packages.
