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AD7302BRZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
AD7302
–6–
REV. 0
TERMINOLOGY
INTEGRAL NONLINEARITY
For the DACs, relative accuracy or endpoint nonlinearity is a
measure of the maximum deviation, in LSBs, from a straight
line passing through the endpoints of the DAC transfer function.
A graphical representation of the transfer curve is shown in
Figure 14.
DIFFERENTIAL NONLINEARITY
Differential Nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ±1 LSB maximum
ensures monotonicity.
ZERO CODE ERROR
Zero Code Error is the measured output voltage from V
OUT
of
either DAC when zero code (all zeros) is loaded to the DAC
latch. It is due to a combination of the offset errors in the DAC
and output amplifier. Zero scale error is expressed in LSBs.
GAIN ERROR
This is a measure of the span error of the DAC. It is the deviation
in slope of the DAC transfer characteristic from ideal, expressed
as a percent of the full-scale value. It includes full-scale errors
but not offset errors.
DIGITAL-TO-ANALOG GLITCH IMPULSE
Digital-to-Analog Glitch Impulse is the impulse injected into the
analog output when the digital inputs change state with the
DAC selected and the LDAC used to update the DAC. It is
normally specified as the area of the glitch in nV-s and is
measured when the digital input code is changed by 1 LSB at
the major carry transition.
DIGITAL FEEDTHROUGH
Digital Feedthrough is a measure of the impulse injected into
the analog output of a DAC from the digital inputs of the same
DAC, but is measured when the DAC is not updated. It is
specified in nV-s and measured with a full-scale code change on
the data bus, i.e., from all 0s to all 1s and vice versa.
DIGITAL CROSSTALK
Digital Crosstalk is the glitch impulse transferred to the output
of one converter due to a digital code change to another DAC.
It is specified in nV-s.
ANALOG CROSSTALK
Analog Crosstalk is a change in output of any DAC in response
to a change in the output of the other DAC. It is measured in
LSBs.
POWER SUPPLY REJECTION RATIO (PSRR)
This specification indicates how the output of the DAC is
affected by changes in the power supply voltage. Power supply
rejection ratio is quoted in terms of % change in output per %
change in V
DD
for full-scale output of the DAC. V
DD
is varied
±10%.
Typical Performance Characteristics–
AD7302
SINK CURRENT – mA
V
OUT
– mV
800
0
0824 6
720
400
240
160
80
640
560
320
480
V
DD
= 5V AND 3V
INTERNAL REFERENCE
T
A
= +25 C
DAC LOADED WITH 00HEX
␣ Figure 2. Output Sink Current Capa-
␣ bility with V
DD
= 3 V and V
DD
= 5 V
REFERENCE VOLTAGE – Volts
ERROR – LSBs
0.5
0
1.0 1.2 2.8
1.4 1.6 1.8 2.2 2.4 2.62.0
0.45
0.25
0.15
0.1
0.05
0.4
0.35
0.2
0.3
V
DD
= 5V
T
A
= +258C
INL ERROR
DNL ERROR
␣␣␣␣Figure 5. Relative Accuracy vs.
␣␣␣␣External Reference
FREQUENCY – Hz
ATTENUATION – dB
1 10 10k100 1k
10
5
–40
0
–5
–10
–15
–20
–25
–30
–35
V
DD
= 5V
EXTERNAL SINEWAVE REFERENCE
DAC REGISTER LOADED WITH FFHEX
T
A
= +25°C
␣␣␣␣␣␣Figure 8. Large Scale Signal
␣␣␣␣␣␣Frequency Response
SOURCE CURRENT – mA
V
OUT
–
Volts
02 846
5
4.92
4.2
4.84
4.76
4.68
4.6
4.52
4.44
4.36
4.28
V
DD
= 5V
INTERNAL REFERENCE
DAC REGISTER LOADED
WITH FFHEX
T
A
= +25°C
Figure 3. Output Source Current
Capability with V
DD
= 5 V
–50 –25
100
TEMPERATURE –
C
5.0
3.5
2.0
I
DD
– mA
4.5
4.0
3.0
2.5
INTERNAL REFERENCE
LOGIC INPUTS = V
DD
OR GND
BOTH DACS ACTIVE
V
DD
= 5.5V
V
DD
= 3.3V
1.5
1.0
0.5
0
0 255075 125
Figure 6. Typical Supply Current
vs. Temperature
T
←
V
OUT
V
DD
= 3V
INTERNAL VOLTAGE
REFERENCE
FULL SCALE CODE
CHANGE 00H-FFH
T
A
= +25°C
1
←
3
←
2
←
V
OUT
CH1 5V, CH2 1V, CH3 20mV
TIME BASE = 200 ns/Div
WR
Figure 9. Full-Scale Settling Time
SOURCE CURRENT – mA
3.5
1.0
01 8234567
3.25
2.5
2.25
1.75
1.25
3.0
2.75
2.0
1.5
V
OUT
– Volts
V
DD
= 3V
INTERNAL REFERENCE
DAC REGISTER LOADED
WITH FFHex
T
A
= +25°C
Figure 4. Output Source Current
Capability with V
DD
= 3 V
V
DD
– Volts
I
DD
– mA
5.0
3.0
1.0
4.0
2.5 3.0 5.53.5 4.0 4.5 5.0
LOGIC INPUTS = V
DD
OR GND
LOGIC INPUTS = V
IH
OR V
IL
BOTH DACS ACTIVE
INTERNAL REFERENCE USED
T
A
= +25°C
2.0
6.0
7.0
Figure 7. Typical Supply Current
vs. Supply Voltage
PD
V
OUT
AD7302 POWER-UP TIME
V
DD
= 5V
INTERNAL REFERENCE
DAC IN POWER-DOWN INITIALLY
1
2
CH1 = 2V/div, CH2 = 5V/Div,
TIME BASE = 2 µs/Div
␣ Figure 10. Exiting Power-Down (Full
␣ Power-Down)
–7–
REV. 0
AD7302
–8–
REV. 0
1
2
V
O
B
M20.0ms
V
O
A
V
DD
3
CH1
CH3
5.00V
5.00V
CH2 5.00V CH1
T
T
T
Figure 11. Power-On—RESET
INPUT CODE (10 to 245)
INL ERROR – LSB
0
256
32 64 96 128 160 192 224
DAC B
DAC A
V
DD
= 5V
INTERNAL REFERENCE
5kΩ 100pf. LOAD
LIMITED CODE RANGE (10–245)
T
A
= +25°C
–0.5
0.4
0.1
–0.1
–0.3
–0.4
0.3
0.2
0
–0.2
0.5
Figure 14. Integral Linearity Plot
–25
4
0
7
6
2
1
5
3
8
9
10
–50 0 25 50 75 100 125
TEMPERATURE – C
DAC A
DAC B
ZERO CODE ERROR – LSB
V
DD
= 2.7 TO 5.5V
DAC LOADED WITH ALL ZEROES
INTERNAL REFERENCE
Figure 12. Zero Code Error vs.
Temperature
V
DD
= 5V
INTERNAL REFERENCE
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
INL ERROR – LSB
TEMPERATURE – 8C
Figure 15. Typical INL vs. Temperature
2
←
1
←
WR
V
OUT
V
DD
= 5V
INTERNAL VOLTAGE
REFERENCE
10 LSB STEP CHANGE
T
A
= +258C
CH1 5.00V, CH2 50.0mV, M 250ns
Figure 13. Small-Scale Settling Time
V
DD
= 5V
INTERNAL REFERENCE
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – 8C
DNL ERROR – LSB
Figure 16. Typical DNL vs. Temperature
V
DD
= 5V
0.6
0.4
0.2
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – 8C
INT REFERENCE ERROR – 6%
0.8
1.0
Figure 17. Typical Internal Reference
Error vs. Temperature
TEMPERATURE – C
0
–50 –25
0 100 125
V
DD
= 5V
LOGIC INPUTS = V
DD
OR GND
100
200
300
400
500
600
700
800
900
1000
25 50 75
POWER-DOWN CURRENT – nA
Figure 18. Power-Down Current vs.
Temperature
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

AD7302BRZ

Mfr. #:
Buy AD7302BRZ
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 2.7-5.5V Parallel Input Dual VOut 8B
Lifecycle:
New from this manufacturer.
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