OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LT8310IFE#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36
LT8310
13
8310f
For more information www.linear.com/LT8310
operaTion
INTRODUCTION
The LT8310 is a constant-frequency forward converter
controller with a low side N-channel MOSFET gate driver
and low side switch current sensing that offers two oper-
ating modes: duty mode control and peak current mode
control.
Duty mode control that requires no output voltage
feedback is targeted for (but not limited to) isolated duty
mode control applications, to which it brings a simple
schematic, low parts count, and only one isolation element,
a transformer. In current mode control applications, feed-
back determines
the output voltage, but the duty control
loop enforces a programmable relative maximum duty
cycle that clamps the volt-seconds of core flux to avoid
transformer saturation during transients. At all times the
LT8310 also enforces an absolute maximum duty cycle
that provides time to reset the core each switching period.
With a patent pending architecture, the LT8310’s duty
control loop imposes volt-second accuracy over the span
of input voltage that translates into both accurate output
voltage without feedback and protection from transformer
saturation.
Duty Mode Control
The duty mode control loop compels a PWM duty cycle
that is inversely proportional to the system input voltage,
D(V
IN
)
∝
1/V
IN
, which is the correct function for a buck
(or buck derived) converter to generate a constant output
regardless of the line input. For a given scaling constant K
D
,
D(V
IN
)=
K
D
V
[ ]
V
IN
[1]
In a forward converter with transformer turns ration N
P
/N
S
,
V
OUT
=
D(V
IN
)• V
IN
N
P
/N
S
=
K
D
N
P
/N
S
[2]
In the discussion that follows it will be helpful to refer to
the Block Diagram in Figure 1. Duty mode control governs
operation when the feedback pin (FBX) is tied to GND. It
serves as an accurate volt-second clamp when current
mode control governs operation because feedback is
present. The system clock starts the PWM duty cycle by
driving the GATE pin high to close the external MOSFET
switch and initiating a timing ramp in the duty loop ramp
generator. While GATE is high, current proportional to V
IN
discharges a capacitor (C
DFILT
) between the DFILT pin and
GND; when GATE is pulled low, a fixed current charges
it. The duty cycle ends when the ramp voltage plus some
switch current feedback exceeds the DFILT voltage, at
which point GATE falls and shuts off the primary-side
switch until the start of the next period.
The condition of the main switch (on or off, as indicated
by GATE pin voltage) controls the sourcing and sinking
of current at the DFILT pin. The voltage imposed between
the INTV
CC
and RDVIN pins, V
SET
, establishes an inter-
nal reference
current (I
REF
). During the switch on-time,
D • t
SW
, a current proportional to the system input voltage
V
IN
(which is sensed at the V
IN
supply pin) is subtracted
from the reference current and driven at DFILT. During the
switch off-time, (1-D) • t
SW
, only the reference current is
driven. The external capacitor to GND at DFILT (C
DFILT
)
integrates the current. In steady-state operation with suf-
ficient load
, the feedback loop forces the net cycle current
to
zero, which produces a duty cycle inversely proportional
to V
IN
(Equation 3), and ultimately a constant output voltage
(Equation 4). An external resistor (R
SET
) between INTV
CC
and RDVIN and a precise 20µA sink at RDVIN program
V
SET
and thus, V
OUT
.
D =
12 • V
SET
V
IN
[3]
V
OUT
=
12 • V
SET
N
P
/N
S
[4]
LT8310
14
8310f
For more information www.linear.com/LT8310
operaTion
Several system operation and protection features are exclu-
sive to current mode control. When the load is light, auto-
matic
pulse skipping allows the effective switching period
to
extend, which lowers the duty cycle without necessitating
impractically narrow GATE pulses. If FBX pin overvoltage
is detected during a cycle, the duty cycle ends, GATE falls,
and the switch turns off, which allows the output voltage
to coast down. When current mode control governs opera
-
tion, the duty loop circuitry acts as a relative maximum duty
cycle clamp that protects the transformer from developing
excessive volt-seconds of flux during transients and it limits
the output voltage. This feature also allows the system to
revert to duty mode control if FBX is grounded. The duty
cycle clamp margin is user-programmable.
Common Operation and Protection Features
A programmable soft-start pin (SS) controls the power-up
time and folds back the switching frequency and the duty
cycle during start-up to protect the transformer and to
limit inrush current. A minimum on-time of 190ns (typ)
ensures that the MOSFET switch has enough time to turn
on reliably, and a maximum duty cycle of 78% guarantees
time for core reset each cycle.
The SYNC pin allows an
external
pulse signal to override the LT8310’s oscillator
and set the switching period. The SOUT pin supplies a
non-overlapping signal complementary to the GATE that
may be used for synchronous converter applications. The
SOUT pin driver has about 40% of the GATE pin’s drive
strength, and may be used to drive a pulse transformer
(isolated) for forced continuous mode (FCM) operation.
Other protection mechanisms end the normal switching
cycle or force system shutdown to protect the applica
-
tion circuit. The minimum and maximum V
IN
operating
thresholds are programmed at the UVLO and OVLO pins,
respectively. Input voltages outside of the set limits shut
down the system. Shutdown also occurs when the INTV
CC
regulator voltage goes above or below its operating range,
and when the die temperature exceeds 165°C. The switch
With no output voltage feedback, the secondary-side LC
filter might freely ring (depending on load resistance and
parasitics) in response to load current steps; the primary-
side switch current that feeds into the duty mode control
loop limits the ringing. During the switch on-time, induc
-
tor current translates to switch current that is scaled and
added
to the timing ramp. Constant
current is absorbed
into the DC level of the DFILT voltage, which does not af-
fect duty
cycle, but changing current dynamically adjusts
the
duty cycle to dampen the ringing. The DFILT capacitor
is chosen with respect to the output LC time constant
(√L1•C
L
) to track out the oscillation. The selection of this
capacitor is discussed in the section, Compensating the
Duty Mode Control Loop.
Duty mode control operation requires a minimum load in
steady-state to balance the sum of the transformer mag
-
netization current
and output inductor ripple current, see
the section, Minimum Load Requirements.
Current Mode Control
To serve applications that require tighter output voltage
regulation and faster load response, the LT8310 offers
standard constant-frequency peak current mode control
when output voltage feedback (opto-isolated or noniso
-
lated) is connected. The system clock starts the PW
M duty
cycle by driving the GATE pin high to close the external
MOSFET switch. The switch current flows through the
external current sensing resistor R
SENSE
and generates
a voltage proportional to the switch current. The current
sense voltage is amplified and added to a stabilizing slope
compensation ramp. When the resulting sum exceeds the
control
pin
(V
C
) voltage, the duty cycle ends, and the main
switch is opened. The V
C
pin level is set by the error ampli-
fier, which amplifies the difference between the reference
voltage
(1.6V or –0.8V, depending on the configuration)
and the feedback pin (FBX) voltage. In this manner, the
error amplifier sets the correct peak switch current level
to keep the output in regulation.
LT8310
15
8310f
For more information www.linear.com/LT8310
Figure 3. Forward Converter Architecture (Nonsynchronous)
V
IN
V
OUT
L1
N
P
:N
S
T1
D2
C
RST
GATE
I
OUT
I
L1
M1
SW
FWD
CAT
••
8310 F02
C
L
LOAD
D1
operaTion
overcurrent limit threshold is programmed at the SENSE
pin. If the maximum current limit is reached, a fault latch
is set and the system shuts down. Upon restart the system
will operate in hiccup mode, which extends the soft-start
time and thus reduces average power dissipated in the
MOSFET during repeated retries.
Forward Converter Basics
A forward converter is a buck-derived topology that
comprises a transformer, a primary-side PWM-controlled
switch, secondary-side switches, an inductor, and a capaci
-
tor, as shown
in Figure 3. The secondary-side switches may
be nonsynchronous (diodes), synchronous (MOSFETs), or
a combination thereof. The transformer provides galvanic
isolation for isolated applications.
Refer to Figure 2 in the following discussion of signals
in a forward converter. When the GATE signal goes high,
the primary winding sees the full input voltage, and the
secondary winding voltage has a value scaled by the turns
ratio, V
IN
/(N
P
/N
S
). During this period the forward diode
Figure 2. Typical Signals in a Forward Converter
D • t
SW
(1 – D) • t
SW
t
SW
V
SW(MAX)
V
SW(PK)
V
SW(PK)
N
P
/N
S
V
IN
V
GATE
V
SW
V
FWD
V
CAT
I
L1
CORE FLUX
TIME
V
IN
N
P
/N
S
I
OUT
0A
t
RST
8310 F03
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36

LT8310IFE#TRPBF

Mfr. #:
Buy LT8310IFE#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 100Vin For Conv Cntr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet