LT8310
24
8310f
For more information www.linear.com/LT8310
applicaTions inForMaTion
Table 2 provides some recommended transformer vendors.
Table 2.Recommended Transformer Manufacturers
MANUFACTURER WEB ADDRESS
Champs Technologies www.champs-tech.com
Coilcraft www.coilcraft.com
Cooper-Coiltronics www.cooperet.com
Pulse Electronics www.pulseelectronics.com
Würth-Midcom www.we-online.com
Resonant Reset Capacitor Selection
The reset capacitor value must be sized to allow a half period
of a sine wave to complete during the shortest off-time the
switch normally experiences, namely when V
IN
is lowest
and the duty cycle is greatest. The LT8310’s maximum
duty cycle clamp of 78% typical/82% maximum (see the
Electrical Characteristics section) sets a lower bound on
the off-time of 18% of the period. Minimum input voltage,
turns ratio, and output voltage target determine the largest
duty cycle in steady state operation, D
MAX
. The resonant
reset time, t
RST
, must fall between the two:
0.18 • t
SW
< t
RST
< (1 - D
MAX
) • t
SW
[29]
The maximum switch node voltage, V
SW(MAX)
, occurs at the
peak of the resonance when the input voltage is greatest. In
practical circuits, the switch node might slew beyond V
IN
before resonating, it might initially spike, and then have a
high frequency ripple, or it might not complete resonance
if the available reset time is too short—all of which change
the peak voltage. Estimate the maximum switch voltage
with
Equation 30, and increase it by at least 20% when
choosing the voltage rating of the reset capacitor.
SW(MAX)
=
IN(MAX)
+V
OUT(TARG)
•
N
P
N
S
⎛
⎝
⎜
⎞
⎠
⎟
•
π
2
•
t
SW
t
RST
[30]
A COG/NPO type capacitor is the best choice for the reso-
nant reset
capacitor—first, for its negligible microphonic
action
that would otherwise cause electronic or audio
interference, and second, for its excellent voltage linearity
and flatness over temperature, which makes for consistent
timing across operating conditions and less margining of
other components and specifications.
An initial design value for the resonant reset capacitor
requires estimates of the transformer’s magnetizing in
-
ductance (Lµ) and
MOSFET output capacitance (C
OSS
), in
addition to the reset time target (Equation 31).
C
RST
=
t
RST
π
⎛
⎝
⎜
⎞
⎠
⎟
•
1
L
µ
− C
OSS
[31]
Board layout, transformer windings, and the forward diodes
also contribute to the total switch node capacitances, and
may be subtracted from the resonant capacitor value as
required. Keep the resonant reset capacitor close to the
MOSFET’s drain at one terminal and well grounded with a
short trace at the other terminal. Prototyping to characterize
the actual reset behavior is highly recommended.
In step-up applications (where N
P
/N
S
< 1), splitting the
capacitance between the primary-side switch node and
the secondary-side forward node may help reduce switch
node ringing. The secondary-side capacitor value reflects
to the primary-side by a factor of (N
S
/N
P
)
2
.
Primary Switch MOSFET Selection
Important parameters for the primary N-channel MOSFET
switch include the maximum drain-source voltage rating
(V
DS
), the gate-source threshold voltage (V
GS
), the on-
resistance (R
DS(ON)
), the gate charge (Q
G
), the maximum
drain current (I
D
), and the thermal resistances (θ
JC
and θ
JA
).
The drain-source breakdown voltage (BV
DSS
or V
DS(MAX)
)
is the key to MOSFET selection because the primary switch
experiences a maximum voltage significantly above the
input (see Figure 3), which was estimated in Equation 30.
Many available
power MOSFETs are avalanche-rated, and
will easily withstand occasional overvoltage, but regular
avalanching is inefficient, and can be destructive depend
-
ing on energy, frequency, and temperature. Derating the
result of Equation 30 by at least 20% and prototyping the
circuit are recommended design procedures.
An internal current limit on the INTV
CC
output protects the
LT8310 from excessive on-chip power dissipation. The
minimum value of this current should be considered when
choosing the main N-channel MOSFET and the operating
frequency. Selection of a lower Q
G
MOSFET allows higher
