ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 28
ICS1894-32 REV M 021512
Note 1: Ignored if Auto negotiation is enabled.
Note 2: CW = Command Override Write
LH = Latching High
LL = Latching Low
LMX = Latching Maximum
RO = Read Only
RW = Read/Write
RW/0 = Read/Write Zero
RW/1 = Read/Write One
SC = Self-clearing
SF = Special Functions
Note 3: L = Latched on power-up/hardware reset
‡ Whenever the PHY address is equal to 00000 (binary), the Isolate bit 0.10 is logic one, whenever the PHY address Is not equal to 00000, the
Isolate bit 0.10 is logic zero.
† As per the IEEE Std 802.3u, during any write operation to any bit in this register, the STA must write the default value to all Reserved bits.
Register 25 - Extended Control Register
25.15:12 Reserved Reserved RW 0 0
25.11 Reserved Reserved RW 0 6
25.10 Reserved Reserved RW 1
25.9 TX10BIAS_SET The normal output current of the Bias block for
10BaseT is 540uA. Changing the register can modify
the current with a step size of 5%
000: output 80% current
001: output 85% current
010: output 90% current
011: output 95% current
100: output 100% current
101: output 105% current
110: output 110% current
111: output 115% current
RW 1
25.8 0
25.7 04
25.6 TX100BIAS_SET The normal output current of the Bias block for
100BaseTX is 180uA. Changing the register can
modify the current with a step size of 5%
000: output 80% current
001: output 85% current
010: output 90% current
011: output 95% current
100: output 100% current
101: output 105% current
110: output 110% current
111: output 115% current
RW 1
25.5 0
25.4 0
25.3 OUTDLY_CTL This register controls the delay time of the digital
control signal for xmit_dac.
00: Longest delay time (same as original design)
01: Long delay time
10: Short delay time
11: Shortest delay time
RW 0 1
25.2
25.1 Reserved Reserved RW 0
25.0 1
Register
26 - 31 - Extended Control Register (Reserved)
Bit Definition When Bit = 0 When Bit = 1 Access
2
SF
2
Default
3
Hex
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 29
ICS1894-32 REV M 021512
DC and AC Operating Conditions
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS1894-32. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Recommended Operating Conditions
Parameter Rating
VDD (measured to VSS) -0.3 V to 3.6V
Digital Inputs / Outputs -0.3 V to VDD +0.3 V
Storage Temperature -55° C to +150° C
Junction Temperature 125° C
Soldering Temperature 260° C
Power Dissipation See section “DC Operating Conditions for Supply Current”
Parameter Symbol Min. Max. Units
Ambient Operating Temperature - Commercial T
A
0+70°C
Ambient Operating Temperature - Industrial T
A
-40 +85 ° C
Power Supply Voltage (measured to VSS) VDD +3.14 +3.47 V
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 30
ICS1894-32 REV M 021512
Recommended Component Values
ICS1894-32 TCSR
Parameter Minimum Typical Maximum Tolerance Units
TCSR Resistor Value 1.82k to GND
18.2k to VDD
–1%Ω
LED Resistor Value 1k Ω
Note:
1. The bias resistor network sets the 10baseT and 100baseTX output amplitude levels.
2. Amplitude is directly related to current sourced out of the TCSR pin.
3. Resistor values shown above are typical. User should check amplitudes and adjust for transformer effects.
4. The 18.2K resistor provides negative feedback to compensate for VDD changes. Reducing the value of
this resistor will lower the 100baseT amplitude. Reducing the value of the resistor to ground on the other
hand will increase the output signal amplitude.
ICS1894-32
78
VDD TCSR
VDD
18.2KΩ 1%
1.82KΩ 1%

1894K-32LF

Mfr. #:
Manufacturer:
IDT
Description:
Ethernet ICs 3.3V 10/100 PHY RMII
Lifecycle:
New from this manufacturer.
Delivery:
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