TEF6730A_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 21 February 2007 12 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
The tuner circuit is controlled by the CONTROL register. Any data change in the
CONTROL register has immediate effect and will change the operation of the tuner circuit
accordingly. Transmitted I
2
C-bus data is not loaded into the CONTROL register directly
but loaded into a BUFFER register instead. This allows the IC to take care of tuning
actions freeing the microcontroller from cumbersome controls and timings.
Controlled by a state machine, the BUFFER data will be loaded into the CONTROL
register for new settings. However, at the same time the CONTROL data is loaded into the
BUFFER register. This register swap action allows a fast return to the previous setting
because the previous data remains available in the BUFFER register (see Figure 6 and
Figure 7).
Via MODE several operational modes can be selected for the state machine. MODE offers
all standard tuning actions as well as generic control for flexibility. The state machine
controls the tuner by controlling the internal I
2
C-bus data. Action progress is monitored by
the accompanying IF DSP via the AFSAMPLE and AFHOLD lines. This way, functions like
tuning mute and weak signal processing can be controlled complementary to the tuner
action.
The state machine operation starts at the end of transmission (P = STOP). In case a
previous action is still active, this is ignored and the new action defined by MODE is
started immediately. When only the address byte is transmitted, no action is started at all
(device presence test).
To minimize the I
2
C-bus transmission time, only bytes that include data changes need to
be written. Following the MSA byte the transmission can start at any given data byte
defined by the subaddress (SA) bits.
Furthermore, when writing the buffered range either the current BUFFER data or the
current CONTROL data can be used as default, controlled by the REGC bit:
• With REGC = 0, any BUFFER data that is not newly written via I
2
C-bus remains
unchanged. In general, the BUFFER register will contain the previous tuner setting, so
this becomes default for the new setting. When only the MSA byte is transmitted
defining a tuning MODE with REGC = 0, the tuner will return to its previous settings
(see Figure 6).
• With REGC = 1, the BUFFER register is loaded with data from the CONTROL register
first. This way, not written BUFFER data equals the CONTROL data. Since the
CONTROL register contains the current tuner setting with REGC = 1, the current
tuner setting is default for the new setting. When a tuning MODE action is defined with
REGC = 1, the tuner will keep its current settings (CONTROL = current) for all data
that is not newly written during the transmission (see Figure 7).
After power-on reset, all registers are in their default settings. The control signals for the
IF DSP are set to AFSAMPLE = HIGH and AFHOLD = HIGH (i.e. mute state). Any action
of the state machine will change this setting to a new one as defined by the bits
MODE[2:0].
