TEF6730A_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 21 February 2007 40 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
[1] Differential current on pins FREF1 and FREF2.
[2] The VCO frequency is determined by the external circuit at pins OSCFDB and OSCTNK.
[3] Conversion gain formula of DAA1: where n = 0 to 127.
[4] Conversion gain formula of DAA2: where n=0to15.
[5] The sink current must be limited to 18 mA by the external circuit.
[6] Input parameters of AM mixer measured between pins AMMIXIN and AMMIXDEC.
[7] Output parameters of AM mixer measured between pins AMMIXOUT1 and AMMIXOUT2.
[8] Input parameters of FM mixer measured between pins FMMIXIN1 and FMMIXIN2.
[9] Output parameters of FM mixer measured between pins FMMIXOUT1 and FMMIXOUT2.
[10] Input parameters of AM IF amplifier measured between pins AMIFAGCIN and IFAGCDEC.
[11] Output parameters of IF AGC amplifier measured between pins IFOUT1 and IFOUT2.
[12] Input parameters of FM IF amplifier measured between pins FMIFAGCIN1 and IFAGCDEC.
[13] Input parameters of FM IF amplifier measured between pins FMIFAGCIN2 and IFAGCDEC.
V
i(max)(M)
peak maximum input
voltage
1 dB compression point of
IF AGC amplifier output
voltage; data byte CONTROL
bit IFGAIN = 0
V
IFAGCMSB
=LOW;
V
IFAGCLSB
=LOW
20 - - mV
V
IFAGCMSB
=LOW;
V
IFAGCLSB
= HIGH
40 - - mV
V
IFAGCMSB
= HIGH;
V
IFAGCLSB
= HIGH
80 - - mV
V
IFAGCMSB
= HIGH;
V
IFAGCLSB
=LOW
160 - - mV
Digital inputs and outputs
Input: pins IFAGCMSB and IFAGCLSB
V
IL
LOW-level input
voltage
- - 0.9 V
V
IH
HIGH-level input
voltage
1.5 - - V
Output: pin AFHOLD
I
sink(max)
maximum sink current AFHOLD = LOW; V
o
= 0.4 V 1.0 - - mA
Output: pin AFSAMPLE
I
sink(max)
maximum sink current AFSAMPLE = LOW;
V
o
= 0.4 V
1.0 - - mA
Output: pin SWPORT
I
sink(max)
maximum sink current data byte CONTROL bit
FLAG = 1; V
o
= 0.4 V
1.0 - - mA
Table 36. Dynamic characteristics
…continued
V
CCA
= 8.5 V; T
amb
=25
°
C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V
DAAOUT1
1.915
n
128
---------
× 0.1+


V
tune
×=
V
DAAOUT2
0.693
n
16
------
× 0.7+


V
DAAOUT1
×=
TEF6730A_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 21 February 2007 41 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
13. I
2
C-bus characteristics
The TEF6730AHW complies with the fast-mode I
2
C-bus protocol. The maximum I
2
C-bus
communication speed is 400 kbit/s.
SDA and SCL HIGH and LOW internal thresholds are specified according to an I
2
C-bus
voltage range from 2.5 V to 3.3 V including I
2
C-bus voltage tolerances of ±10 %. The
I
2
C-bus interface tolerates also SDA and SCL signals from a 5 V bus. Restrictions for V
IL
in a 5 V application can be derived from Table 37.
Fig 19. AM LNA transconductance gain deviation over
temperature (including application)
Fig 20. AM mixer conversion transconductance gain
deviation over temperature (including
application)
001aae090
T
amb
(°C)
40 10080040
0
1
1
2
G
m(T)
(dB)
2
001aae091
T
amb
(°C)
40 10080040
0
0.5
0.5
1.0
1.0
G
m(conv)(T)
(dB)
Fig 21. FM mixer conversion transconductance gain
deviation over temperature (including
application)
Fig 22. Weather band mixer conversion
transconductance gain deviation over
temperature (including application)
001aae092
T
amb
(°C)
40 10080040
0.5
1.0
0
0.5
1.5
G
m(conv)(T)
(dB)
001aae093
T
amb
(°C)
40 10080040
0
5
5
10
10
G
m(conv)(T)
(dB)
TEF6730A_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 21 February 2007 42 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
[1] Minimum value of t
of
; C
b
= total capacitance of one I
2
C-bus line [pF].
[2] Typical value of t
of
; the output fall time t
of
[ns] depends on the total load capacitance C
b
[pF] and the I
2
C-bus voltage V
DD
[V]:
t
of
=
1
12
× V
DD
× C
b
.
Table 37. I
2
C-bus parameters
Symbol Parameter Conditions Min Typ Max Unit
V
IL
LOW-level input
voltage
- - 1.09 V
V
IH
HIGH-level input
voltage
1.56 - - V
C
i
capacitance for each
I/O pin
pin SDA - 4 6 pF
pin SCL - 3 5 pF
t
resp(Q)HL
HIGH-to-LOW data
output response time
acknowledge and read data;
see
Figure 23
V
DD
=5V; I=3mA;
C
b
= 400 pF
- 700 863 ns
V
DD
= 3.3 V; R
p
= 1.8 k;
C
b
= 400 pF
- 570 668 ns
V
DD
= 2.5 V; R
p
=35k;
C
b
=10pF
- 520 593 ns
t
resp(Q)LH
LOW-to-HIGH data
output response time
read data; see Figure 23 - 450 488 ns
t
of
output fall time from
V
IHmin
to V
ILmax
C
b
= 10 pF to 120 pF;
see
Figure 24
[1]
20 + 0.1C
b
10 × V
DD
-ns
C
b
120 pF; see Figure 24
[1][2]
20 + 0.1C
b
- 250 ns
a. Data change from LOW to HIGH b. Data change from HIGH to LOW
Fig 23. Data output response time of the IC
001aaf002
SDA
SCL
V
IL(max)
t
resp(Q)LH
001aaf001
V
IL(max)
0.7V
DD
t
resp(Q)HL

TEF6730AHW/V1,557

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
RF RECEIVER AM/FM/WB 64HTQFP
Lifecycle:
New from this manufacturer.
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