DS1977
19 of 29
RESUME COMMAND [A5h]
The Resume Command function maximizes the data throughput in a multidrop environment. This function checks
the status of the RC bit and, if it is set, directly transfers control to the Memory/Control functions, similar to a Skip
ROM command. The only way to set the RC bit is through successfully executing the Match ROM, Search ROM or
Overdrive Match ROM command. Once the RC bit is set, the device can repeatedly be accessed through the
Resume Command function. Accessing another device on the bus will clear the RC bit, preventing two or more
devices from simultaneously responding to the Resume Command function.
OVERDRIVE SKIP ROM [3CH]
On a single-drop bus this command can save time by allowing the bus master to access the memory functions
without providing the 64-bit ROM code. Unlike the normal Skip ROM command, the Overdrive Skip ROM sets the
DS1977 in the Overdrive mode (OD = 1). All communication following this command has to occur at Overdrive
speed until a reset pulse of minimum 480µs duration resets all devices on the bus to standard speed (OD = 0).
When issued on a multidrop bus this command will set all Overdrive-supporting devices into Overdrive mode. To
subsequently address a specific Overdrive-supporting device, a reset pulse at Overdrive speed has to be issued
followed by a Match ROM or Search ROM command sequence. This will speed up the time for the search process.
If more than one slave supporting Overdrive is present on the bus and the Overdrive Skip ROM command is
followed by a Read command, data collision will occur on the bus as multiple slaves transmit simultaneously (open
drain pulldowns will produce a wired-AND result).
OVERDRIVE MATCH ROM [69H]
The Overdrive Match ROM command followed by a 64-bit ROM sequence transmitted at Overdrive Speed allows
the bus master to address a specific DS1977 on a multidrop bus and to simultaneously set it in Overdrive mode.
Only the DS1977 that exactly matches the 64-bit ROM sequence will respond to the subsequent memory function
command. Slaves already in Overdrive mode from a previous Overdrive Skip or Match command will remain in
Overdrive mode. All overdrive-capable slaves will return to standard speed at the next Reset Pulse of minimum
480µs duration. The Overdrive Match ROM command can be used with a single or multiple devices on the bus.
1-Wire SIGNALING
The DS1977 requires strict protocols to ensure data integrity. The protocol consists of five types of signaling on one
line: Reset Sequence with Reset Pulse and Presence Pulse, Write-Zero, Write-One Read-Data, and strong pullup
to supply power over the 1-Wire line. Except for the presence pulse the bus master initiates all these signals. The
DS1977 can communicate at two different speeds, standard speed and Overdrive Speed. If not explicitly set into
the Overdrive mode, the DS1977 will communicate at standard speed. While in Overdrive mode the fast timing
applies to all waveforms.
To get from idle to active, the voltage on the 1-Wire line needs to fall from V
PUP
below the threshold V
TL
. To get
from active to idle, the voltage needs to rise from V
ILMAX
past the threshold V
TH
. The time it takes for the voltage to
make this rise, in Figure 10 as ε , and its duration depends on the pullup resistor (RPUP) used and capacitance of
the 1-Wire network attached. The voltage V
ILMAX
is relevant for the DS1977 when determining a logical level, not
triggering any events.
The initialization sequence required to begin any communication with the DS1977 is shown in Figure 10. A Reset
Pulse followed by a Presence Pulse indicates the DS1977 is ready to receive data, given the correct ROM and
memory function command. If the bus master uses slew-rate control on the falling edge, it must pull down the line
for t
RSTL
+ t
F
to compensate for the edge. A t
RSTL
duration of 480µs or longer will exit the Overdrive mode returning
the device to standard speed. If the DS1977 is in Overdrive Mode and t
RSTL
is no longer than 80µs the device will
remain in Overdrive mode.
DS1977
20 of 29
Figure 10. INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES”
After the bus master has released the line it goes into receive mode (RX). Now the 1-Wire bus is pulled to V
PUP
via
the pullup resistor or, in case of a DS2480B driver, by active circuitry. When the threshold V
TH
is crossed, the
DS1977 waits for t
PDH
and then transmits a Presence Pulse by pulling the line low for t
PDL
. To detect a presence
pulse, the master must test the logical state of the 1-Wire line at t
MSP
.
The t
RSTH
window must be at least the sum of t
PDHMAX
, t
PDLMAX
, and t
RECMIN
. Immediately after t
RSTH
is expired, the
DS1977 is ready for data communication. In a mixed population network t
RSTH
should be extended to minimum
480µs at standard speed and 48µs at Overdrive speed to accommodate other 1-Wire devices.
READ/WRITE-TIME SLOTS
Data communication with the DS1977 takes place in time slots, which carry a single bit each. Write-time slots
transport data from bus master to slave. Read-time slots transfer data from slave to master. The definitions of the
write and read-time slots are illustrated in Figure 11.
All communication begins with the master pulling the data line low. As the voltage on the 1-Wire line falls below the
threshold V
TL
, the DS1977 starts its internal timing generator that determines when the data line will be sampled
during a write-time slot and how long data will be valid during a read-time slot.
MASTER-TO-SLAVE
For a write-one time slot, the voltage on the data line must have crossed the V
THMAX
threshold after the write-one
low time t
W1LMAX
is expired. For a write-zero time slot, the voltage on the data line must stay below the V
THMIN
threshold until the write-zero low time t
W0LMIN
is expired. For most reliable communication the voltage on the data
line should not exceed V
ILMAX
during the entire t
W0L
window. After the V
THMAX
threshold has been crossed, the
DS1977 needs a recovery time t
REC
before it is ready for the next time slot.
Figure 11. READ/WRITE TIMING DIAGRAM
Write-One Time Slot
RESISTOR MASTER
V
PUP
V
IHMASTER
V
TH
V
TL
V
ILMAX
0V
t
F
t
SLOT
t
W1L
ε
DS1977
21 of 29
Figure 11. READ/WRITE TIMING DIAGRAM (continued)
Write-Zero Time Slot
RESISTOR MASTER
t
REC
V
PUP
V
IHMASTER
V
TH
V
TL
V
ILMAX
0V
t
F
t
SLOT
t
W0L
ε
Read-Data Time Slot
SLAVE-TO-MASTER
A read-data time slot begins like a write-one time slot. The voltage on the data line must remain below V
TLMIN
until
the read low time t
RL
is expired. During the t
RL
window, when responding with a 0, the DS1977 will start pulling the
data line low; its internal timing generator determines when this pulldown ends and the voltage starts rising again.
When responding with a 1, the DS1977 will not hold the data line low at all, and the voltage starts rising as soon as
t
RL
is over.
The sum of t
RL
+ δ (rise rime) on one side and the internal timing generator of the DS1977 on the other side define
the master sampling window (t
MSRMIN
to t
MSRMAX
) in which the master must perform a read from the data line. For
most reliable communication, t
RL
should be as short as permissible and the master should read close to but no later
than t
MSRMAX
. After reading from the data line, the master must wait until t
SLOT
is expired. This guarantees sufficient
recovery time t
REC
for the DS1977 to get ready for the next time slot.
IMPROVED NETWORK BEHAVIOR
1-Wire networks can only be terminated during transients controlled by the bus master (1-Wire driver) and are
therefore susceptible to noise of various origins. Depending on the physical size and topology of the network,
reflections from end points and branch points can add up or cancel each other to some extent. Such reflections are
visible as glitches or ringing on the 1-Wire communication line. A glitch during the rising edge of a time slot can
cause a slave device to lose synchronization with the master and, as a consequence, result in a search ROM
command coming to a dead end. For better performance in network applications, the DS1977 uses a new 1-Wire
front end, which makes it less sensitive to noise and also reduces the magnitude of noise injected by the slave
device itself.
The 1-Wire front end of the DS1977 differs from traditional slave devices in four characteristics.
1) The falling edge of the presence pulse has a controlled slew rate. This provides a better match to the line
impedance than a digitally switched transistor, converting the high frequency ringing known from traditional

DS1977-F5#

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