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Read Access Password
This password only applies to the function "Read Memory with Password”. If passwords are enabled (EPW = AAh,
see Password Control register), the 64-bit data pattern that the 1-Wire master has to transmit with the command
flow is compared to the passwords stored in the DS1977 i
Button. The DS1977 delivers the requested data only if
the password transmitted by the master was correct or if password checking is not enabled.
Read Access Password Register
ADDR
b7
b6
b5
b4
b3
b2
b1
b0
7FC0h
RP7
RP6
RP5
RP4
RP3
RP2
RP1
RP0
7FC1h
RP15
RP14
RP13
RP12
RP11
RP10
RP9
RP8
7FC6h
RP55
RP54
RP53
RP52
RP51
RP50
RP49
RP48
7FC7h
RP63
RP62
RP61
RP60
RP59
RP58
RP57
RP56
There is only write access to this register. The Read Access Password needs to be transmitted exactly in the
sequence RP0, RP1… RP62, RP63.
Full Access Password
This password applies to the functions "Read Memory with Password” and "Copy Scratchpad with Password”. If
passwords are enabled (EPW = AAh, see Password Control register), the 64-bit data pattern that the 1-Wire
master has to transmit with the command flow is compared to the passwords stored in the DS1977 i
Button. The
DS1977 executes the command only if the password transmitted by the master was correct or if password
checking is not enabled.
Full Access Password Register
ADDR
b7
b6
b5
b4
b3
b2
b1
b0
7FC8h
FP7
FP6
FP5
FP4
FP3
FP2
FP1
FP0
7FC9h
FP15
FP14
FP13
FP12
FP11
FP10
FP9
FP8
7FCEh
FP55
FP54
FP53
FP52
FP51
FP50
FP49
FP48
7FCFh
FP63
FP62
FP61
FP60
FP59
FP58
FP57
FP56
There is only write access to this register. The Full Access Password needs to be transmitted exactly in the
sequence FP0, FP1… FP62, FP63.
Password Control Register
The data pattern stored in the Password Control Register determines whether password checking is enabled. If
password checking is enabled, the password transmitted is compared to the passwords stored in the device.
Reading from or writing to the scratchpad does not require a password.
Password Control Register Bitmap
ADDR
b7
b6
b5
b4
b3
b2
b1
b0
7FD0h
EPW
Register Details
BIT DESCRIPTION BIT(S) DEFINITION
EPW: Enable Passwords b0 to b7
This byte enables or disables the password protection, which applies
to reading from and writing to the memory except for the scratchpad.
If the EPW bits form a pattern of 10101010 (AAh), the device will
execute these commands only if the correct password is transmitted.
The default pattern of EPW is different from AAh.
To enable password checking, the EPW bits need to form a binary pattern of 10101010 (AAh). If the EPW pattern
is different from AAh, any password will be accepted, as long as it has a length of exactly 64 bits. Before enabling
DS1977
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passwords, check whether the new password has been successfully installed. See Verify Password command for
details. Once enabled, changing the passwords or disabling password checking requires the knowledge of the
current full-access password.
VERSION REGISTER
The DS1977 includes a read-only Version register, which is not a component of the memory map. Therefore, a
special command is used to read this register. The Chip Revision number enables application software to
automatically use the appropriate software driver in case of different logical behavior.
Version Register Bitmap
b7
b6
b5
b4
b3
b2
b1
b0
VER2
VER1
VER0
0
0
0
0
0
Bits 0 to 4 have no function. They always read 0.
Register Details
BIT DESCRIPTION BIT(S) DEFINITION
(N/A) b0 to b4 These bits are all 0.
VER: Chip Revision
Indicator
b5 to b7
Chip revision code. The initial version of the DS1977 will have all
revision bits set to 0.
Figure 6. ADDRESS REGISTERS
Target Address (TA1) T7 T6 T5 T4 T3 T2 T1 T0
Target Address (TA2) T15 T14 T13 T12 T11 T10 T9 T8
Ending Address with
Data Status (E/S)
(Read Only)
AA PF E5 E4 E3 E2 E1 E0
ADDRESS REGISTERS AND TRANSFER STATUS
Because of the serial data transfer, the DS1977 employs three address registers, called TA1, TA2, and E/S (Figure
6). Registers TA1 and TA2 must be loaded with the target address to which the data will be written or from which
data will be sent to the master upon a Read command. Register E/S acts like a byte counter and Transfer Status
register. It is used to verify data integrity with write commands. Therefore, the master only has read access to this
register. The lower six bits of the E/S register indicate the address of the last byte that has been written to the
scratchpad. This address is called Ending Offset. Bit 6 of the E/S register, called PF, is set if the number of data
bits sent by the master is not an integer multiple of 8 or if the data in the scratchpad is not valid due to a loss of
power. A valid write to the scratchpad will clear the PF bit. Note that the lowest six bits of the target address also
determine the address within the scratchpad, where intermediate storage of data will begin. This address is called
byte offset. If the target address for a Write command is 103Ch for example, then the scratchpad will store
incoming data beginning at the byte offset 3Ch and will be full after only four bytes. The corresponding ending
offset in this example is 3Fh. For best economy of speed and efficiency, the target address for writing should point
to the beginning of a new page, i.e., the byte offset will be 0. Thus the full 64-byte capacity of the scratchpad is
available, resulting also in the ending offset of 3Fh. However, it is possible to write one or several contiguous bytes
somewhere within a page. The ending offset together with the Partial Flag support the master checking the data
integrity after a Write command. The highest valued bit of the E/S register, called AA is valid only if the PF flag
reads 0. If PF is 0 and AA is 1, a copy has taken place. The AA bit is cleared when the device receives a write
scratchpad command.
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WRITING WITH VERIFICATION
To write data to the DS1977 , the scratchpad has to be used as intermediate storage. First the master issues the
Write Scratchpad command to specify the desired target address, followed by the data to be written to the
scratchpad. Under certain conditions (see Write Scratchpad command) the master will receive an inverted CRC16
of the command, address and data at the end of the write scratchpad command sequence. Knowing this CRC
value, the master can compare it to the value it has calculated itself to decide whether the communication was
successful and proceed to the Copy Scratchpad command. If the master could not receive the CRC16, it has to
send the Read Scratchpad command to read back the scratchpad to verify data integrity. As preamble to the
scratchpad data, the DS1977 repeats the target address TA1 and TA2 and sends the contents of the E/S register.
If the PF flag is set, data did not arrive correctly in the scratchpad or there was a loss of power since data was last
written to the scratchpad. The master does not need to continue reading; it can start a new trial to write data to the
scratchpad. Similarly, a set AA flag together with a cleared PF flag indicates that the Write command was not
recognized by the device. If everything went correctly, both flags are cleared and the ending offset indicates the
address of the last byte written to the scratchpad; the master can continue reading and verifying every data byte.
After the master has verified the data, it has to send the Copy Scratchpad command. This command must be
followed exactly by the data of the three address registers TA1, TA2, and E/S. The master may obtain the contents
of these registers by reading the scratchpad or derive it from the target address and the amount of data to be
written. As soon as the DS1977 has received these bytes correctly and the master has provided an acceptable
password, the DS1977 will copy the scratchpad data to the requested location beginning at the target address.
MEMORY FUNCTION COMMANDS
The “Memory Function Flow Chart” (Figure 7) describes the protocols necessary for accessing the memory and the
special function registers of the DS1977. Examples on how to use these functions to operate the DS1977 are
included at the end of this document, preceding the Electrical Characteristics section. The communication between
master and DS1977 takes place either at standard speed (default, OD = 0) or at Overdrive Speed (OD = 1). If not
explicitly set into the Overdrive mode the DS1977 assumes regular speed.
Write Scratchpad Command [0Fh]
This command is used to specify the target address and to write data to the scratchpad for verification before the
transfer to the EEPROM can be initiated. After issuing the write scratchpad command, the master must first provide
the 2-byte target address, followed by the data to be written to the scratchpad. The data will be written to the
scratchpad starting at the byte offset (T5:T0). The ending offset (E5: E0) will be the byte offset at which the master
stops writing data. Only full data bytes are accepted. If the last data byte is incomplete its content will be ignored
and the partial byte flag PF will be set. When writing to a password address, internal circuitry of the chip will force
the 3 least significant address bits to 0. Only full 8-byte passwords are accepted. The ending offset will be 07 or 0F,
depending on the password(s) to be changed.
When executing the Write Scratchpad command the CRC generator inside the DS1977 (Figure 13) calculates an
inverted CRC over the entire data stream, starting at the command code and ending at the last data byte sent by
the master. This CRC is generated using the CRC16 polynomial by first clearing the CRC generator and then
shifting in the command code (0FH) of the Write Scratchpad command, the Target Addresses TA1 and TA2 as
supplied by the master and all the data bytes. The master may end the Write Scratchpad command at any time.
However, if the ending offset is 3Fh, the master may send 16 read-time slots and will receive the CRC generated
by the DS1977 .
The memory address range of the DS1977 is 0000h to 7FFFh (Figure 5). There is no user-access to the address
range 7FD1h to 7FFFh. If the master sends a target address higher than this, the internal circuitry of the chip will
set the most significant address bit to zero as it is shifted into the internal address register. The Read Scratchpad
command will reveal the target address as it will be used by the DS1977 . The master will identify such address
modifications by comparing the target address read back to the target address transmitted. If the master does not
read the scratchpad, a subsequent copy scratchpad command will not work since the most significant bits of the
target address the master sends will not match the value the DS1977 expects.
Read Scratchpad Command [AAh]
This command is used to verify scratchpad data and target address. After issuing the Read Scratchpad command,
the master begins reading. The first 2 bytes will be the target address. The next byte will be the ending offset/data
status byte (E/S) followed by the scratchpad data beginning at the byte offset (T5:T0), as shown in Figure 6.

DS1977-F5#

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
iButtons & Accessories Password-Protected 32KB EEPROM iButton
Lifecycle:
New from this manufacturer.
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