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83940DYILFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
ICS83940DYI REVISION C May 19, 2016 16 ©2016 Integrated Device Technology, Inc.
ICS83940DI Data Sheet LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
Package Outline and Package Dimensions
Package Outline - K Suffix for 32 Lead VFQFN
Table 7B. Package Dimensions
Reference Document: JEDEC Publication 95, MO-220
NOTE: The following package mechanical drawing is a generic
drawing that applies to any pin count VFQFN package. This drawing
is not intended to convey the actual pin count or pin layout of this
device. The pin count and pinout are shown on the front page. The
package dimensions are in Table 7B.
To p View
Index Area
D
Chamfer 4x
0.6 x 0.6 max
OPTIONAL
Anvil
Singula tion
A
0. 08 C
C
A3
A1
S eating Plane
E2
E2
2
L
(N
-1)x e
(R ef.)
(Ref.)
N & N
Even
N
e
D2
2
D2
(Ref.)
N & N
Odd
1
2
e
2
(Ty p.)
If N & N
are Even
(N -1)x e
(Re f.)
b
Th er mal
Base
N
OR
Anvil
Singulation
N-1N
CHAMFER
1
2
N-1
1
2
N
RADIUS
4
4
Bottom View w/Type C IDBottom View w/Type A ID
There are 2 methods of indicating pin 1 corner at the back of the VFQFN package:
1. Type A: Chamfer on the paddle (near pin 1)
2. Type C: Mouse bite on the paddle (near pin 1)
JEDEC Variation: VHHD-2/-4
All Dimensions in Millimeters
Symbol Minimum Nominal Maximum
N 32
A 0.80 1.00
A1 00.05
A3 0.25 Ref.
b 0.18 0.25 0.30
N
D
& N
E
8
D & E 5.00 Basic
D2 & E2 3.0 3.3
e 0.50 Basic
L 0.30 0.40 0.50
ICS83940DYI REVISION C May 19, 2016 17 ©2016 Integrated Device Technology, Inc.
ICS83940DI Data Sheet LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
Ordering Information
Table 8. Ordering Information
Part/Order Number Marking Package Shipping Packaging Temperature
83940DYILF ICS83940DYIL “Lead-Free” 32 Lead LQFP Tray -40C to 85C
83940DYILFT ICS83940DYIL “Lead-Free” 32 Lead LQFP Tape & Reel -40C to 85C
83940DKILF ICS83940DIL “Lead-Free” 32 Lead VFQFN Tray -40C to 85C
83940DKILFT ICS83940DIL “Lead-Free” 32 Lead VFQFN Tape & Reel -40C to 85C
ICS83940DYI REVISION C May 19, 2016 18 ©2016 Integrated Device Technology, Inc.
ICS83940DI Data Sheet LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
Revision History Sheet
Rev Table Page Description of Change Date
A
T2 2
7
Pin Characteristics table - changed R
OUT
25 maximum to 28 maximum.
Delete R
PULLUP
row.
3.3V Output Load AC Test Circuit diagram - corrected GND equation to read
-1.65V... from -1.165V...
Added LVTTL to title.
Updated format.
12/12/02
A
T8
1
9
10
13
Features Section - added Lead-Free bullet.
Application Information Section - added Recommendations for Unused Input and
Output Pins.
Application Information Section - added LVPECL Clock Input Interface.
Ordering Information Table - added Lead-Free part number, marking, and note.
Updated datasheet format.
11/27/06
A
3 Absolute Maximum Ratings - corrected Storage Temperature from
“-40°C to 125°C” to “-65°C to 150°C”.
2/21/07
B
T6B
T7B
T8
1
13
14
16
17
Added 32 Lead VFQFN Pin Assignment.
Added VFQFN Thermal Release Path section.
Added 32 VFQFN Thermal Table.
Added 32 Lead VFQFN Package and Dimensions Table.
Ordering Information Table - added 32 Lead VFQFN ordering information.
Converted datasheet format.
8/13/09
C
T2 2
11
16
Pin Characteristics Table - R
OUT
error, typical spec deleted.
Updated Wiring the Differential Input to Accept Single-Ended Levels.
Updated 32 VFQFN Package Outline.
9/7/10
C T8 17 Removed leaded orderables from Ordering Information table 11/27/12
C 1, 14,16 Deleted “PROPOSED” stamp 3/20/13
C
Product Discontinuation Notice - Last time buy expires May 6, 2017.
(83940DKILF)
PDN CQ-16-01
5/19/16
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

83940DYILFT

Mfr. #:
Buy 83940DYILFT
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 18 LVCMOS OUT BUFFER
Lifecycle:
New from this manufacturer.
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