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83940DYILFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
ICS83940DYI REVISION C May 19, 2016 4 ©2016 Integrated Device Technology, Inc.
ICS83940DI Data Sheet LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC
Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
DC Electrical Characteristics
Table 4A. DC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= -40°C to 85°C
NOTE 1: V
IL
should not be less than -0.3V.
NOTE 2: Common mode voltage is defined as V
IH
.
Table 4B. DC Characteristics, V
DD
= 3.3V ± 5%, V
DDO
= 2.5V ± 5%, T
A
= -40°C to 85°C
NOTE 1: V
IL
should not be less than -0.3V.
NOTE 2: Common mode voltage is defined as V
IH
.
Item Rating
Supply Voltage, V
DD
3.6V
Inputs, V
I
-0.3V to V
DD
+ 0.3V
Outputs, V
O
-0.3V to V
DDO
+ 0.3V
Input Current, I
IN
±20mA
Storage Temperature, T
STG
-65C to 150C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage LVCMOS_CLK 2.4 V
DD
V
V
IL
Input Low Voltage LVCMOS_CLK 0.8 V
I
IN
Input Current ±200 µA
V
OH
Output High Voltage I
OH
= -20mA 2.4 V
V
OL
Output Low Voltage I
OL
= 20mA 0.5 V
V
PP
Peak-to-Peak Input Voltage;
NOTE 1
PCLK, nPCLK 500 1000 mV
V
CMR
Common Mode Input
Voltage; NOTE 1, 2
PCLK, nPCLK
V
DD
– 1.45 V
DD
– 0.6 V
I
DD
Power Supply Current 25 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage LVCMOS_CLK 2.4 V
DD
V
V
IL
Input Low Voltage LVCMOS_CLK 0.8 V
I
IN
Input Current ±200 µA
V
OH
Output High Voltage I
OH
= -20mA 1.8 V
V
OL
Output Low Voltage I
OL
= 20mA 0.5 V
V
PP
Peak-to-Peak Input Voltage;
NOTE 1
PCLK, nPCLK 300 1000 mV
V
CMR
Common Mode Input
Voltage; NOTE 1, 2
PCLK, nPCLK
V
DD
– 1.4 V
DD
– 0.6 V
I
DD
Power Supply Current 25 mA
ICS83940DYI REVISION C May 19, 2016 5 ©2016 Integrated Device Technology, Inc.
ICS83940DI Data Sheet LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
Table 4C. DC Characteristics, V
DD
= V
DDO
= 2.5V ± 5%, T
A
= -40°C to 85°C
NOTE 1: V
IL
should not be less than -0.3V.
NOTE 2: Common mode voltage is defined as V
IH
.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage LVCMOS_CLK 2 V
DD
V
V
IL
Input Low Voltage LVCMOS_CLK 0.8 V
I
IN
Input Current ±200 µA
V
OH
Output High Voltage I
OH
= -12mA 1.8 V
V
OL
Output Low Voltage I
OL
= 12mA 0.5 V
V
PP
Peak-to-Peak Input Voltage;
NOTE 1
PCLK, nPCLK 300 1000 mV
V
CMR
Common Mode Input
Voltage; NOTE 1, 2
PCLK, nPCLK
V
DD
– 1.4 V
DD
– 0.6 V
I
DD
Power Supply Current 25 mA
ICS83940DYI REVISION C May 19, 2016 6 ©2016 Integrated Device Technology, Inc.
ICS83940DI Data Sheet LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER
AC Electrical Characteristics
Table 5A. AC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters measured at 200MHz unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the output V
DDO
/2.
NOTE 2: Measured from V
DD
/2 to V
DDO
/2.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V
DDO
/2.
NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at V
DDO
/2.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 6: Defined as skew between outputs on different devices, across temperature and voltage ranges, and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at V
DDO
/2.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 250 MHz
t
PLH
Propagation
Delay
PCLK, nPCLK; NOTE 1, 5 ƒ 150MHz 1.6 3.0 ns
LVCMOS_CLK; NOTE 2, 5 ƒ 150MHz 1.8 3.0 ns
Propagation
Delay
PCLK, nPCLK; NOTE 1, 5 ƒ > 150MHz 1.6 3.3 ns
LVCMOS_CLK; NOTE 2, 5 ƒ > 150MHz 1.8 3.2 ns
tsk(o)
Output Skew;
NOTE 3, 5
PCLK, nPCLK
Measured on the Rising Edge
@ V
DDO
/2
150 ps
LVCMOS_CLK 150 ps
tsk(pp)
Part-to-Part Skew;
NOTE 6
PCLK, nPCLK ƒ 150MHz 1.4 ns
LVCMOS_CLK ƒ 150MHz 1.2 ns
Part-to-Part Skew;
NOTE 6
PCLK, nPCLK ƒ > 150MHz 1.7 ns
LVCMOS_CLK ƒ > 150MHz 1.4 ns
Part-to-Part Skew;
NOTE 4, 5
PCLK, nPCLK
Measured on the Rising Edge
@ V
DDO
/2
850 ps
LVCMOS_CLK 750 ps
t
R
/ t
F
Output Rise/Fall Time 0.5V to 2.4V 0.3 1.1 ns
odc Output Duty Cycle
ƒ < 134MHz 45 50 55 %
134MHz ƒ 250MHz 40 50 60 %
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

83940DYILFT

Mfr. #:
Buy 83940DYILFT
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 18 LVCMOS OUT BUFFER
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