1
FN8131.3
X5323, X5325
(Replaces X25323, X25325)
CPU Supervisor with 32kBit SPI EEPROM
These devices combine four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage Supervision,
and Block Lock
Protect Serial EEPROM Memory in one
package. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET
/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor can execute code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontroller
fails to restart a timer within a selectable time out interval,
the device activates the RESET
/RESET signal. The user
selects the interval from three preset values. Once selected,
the interval does not change, even after cycling the power.
The device’s low V
CC
detection circuitry protects the user’s
system from low voltage conditions, resetting the system
when V
CC
falls below the minimum V
CC
trip point.
RESET
/RESET is asserted until V
CC
returns to proper
operating level and stabilizes. Five industry standard V
TRIP
thresholds are available, however, Intersil’s unique circuits
allow the threshold to be reprogrammed to meet custom
requirements or to fine-tune the threshold for applications
requiring higher precision.
Features
• Selectable watchdog timer
•Low V
CC
detection and reset assertion
- Five standard reset threshold voltages
- Re-program low V
CC
reset threshold voltage using
special programming sequence
- Reset signal valid to V
CC
= 1V
• Determine watchdog or low voltage reset with a volatile
flag bit
• Long battery life with low power consumption
- <50µA max standby current, watchdog on
- <1µA max standby current, watchdog off
- <400µA max active current during read
• 32kbits of EEPROM
• Built-in inadvertent write protection
- Power-up/power-down protection circuitry
- Protect 0, 1/4, 1/2 or all of EEPROM array with Block
Lock
™
protection
- In circuit programmable ROM mode
• 2MHz SPI interface modes (0,0 and 1,1)
• Minimize EEPROM programming time
- 32-byte page write mode
- Self-timed write cycle
- 5ms write cycle time (typical)
• 2.7V to 5.5V and 4.5V to 5.5V power supply
operation
• Available packages
- 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
• Pb-free (RoHS compliant)
Block Diagram
WATCHDOG
TIMER RESET
DATA
REGISTER
COMMAND
DECODE AND
CONTROL
LOGIC
SI
SO
SCK
CS
/WDI
V
CC
RESET AND
WATCHDOG
TIMEBASE
POWER-ON AND
GENERATION
V
TRIP
+
-
RESET/RESET
RESET
LOW VOLTAGE
STATUS
REGISTER
PROTECT LOGIC
8kBITS
8kBITS
16kBITS
EEPROM ARRAY
WATCHDOG TRANSITION
DETECTOR
WP
X5323 = RESET
X5325 = RESET
V
CC
THRESHOLD
RESET LOGIC
Data Sheet December 9, 2015
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC
2003-2008, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
