10
FN8131.3
December 9, 2015
Absolute Maximum Ratings Thermal Information
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on any Pin with Respect to V
SS
. . . . . . . . . . . . -1.0V to +7V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Operating Conditions
Temperature Range (Industrial) . . . . . . . . . . . . . . . . .-40°C to +85°C
Temperature Range (Commercial). . . . . . . . . . . . . . . . 0°C to +70°C
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
DC Electrical Specifications Over the recommended operating conditions, unless otherwise specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
V
CC
Write Current (active) I
CC1
SCK = V
CC
x 0.1/V
CC
x 0.9 @ 2MHz, SO = Open 5 mA
V
CC
Read Current (active) I
CC2
SCK = V
CC
x 0.1/V
CC
x 0.9 @ 2MHz, SO = Open 0.4 mA
V
CC
Standby Current WDT = OFF I
SB1
CS = V
CC
, V
IN
= V
SS
or V
CC
,
V
CC
=5.5V 1 µA
V
CC
Standby Current WDT = ON I
SB2
CS = V
CC
, V
IN
= V
SS
or V
CC
,
V
CC
= 5.5V
50 µA
V
CC
Standby Current WDT = ON I
SB3
CS = V
CC
,
V
IN
= V
SS
or V
CC
,
V
CC
=3.6V 20 µA
Input Leakage Current I
LI
V
IN
= V
SS
to V
CC
0.110µA
Output Leakage Current I
LO
V
OUT
= V
SS
to V
CC
0.1 10 µA
Input LOW Voltage V
IL
(Note 1)
-0.5 V
CC
x 0.3 V
Input HIGH Voltage V
IH
(Note 1)
V
CC
x 0.7 V
CC
+ 0.5 V
Output LOW Voltage V
OL1
V
CC
> 3.3V, I
OL
= 2.1mA 0.4 V
Output LOW Voltage V
OL2
2V < V
CC
3.3V, I
OL
= 1mA 0.4 V
Output LOW Voltage V
OL3
V
CC
2V, I
OL
= 0.5mA 0.4 V
Output HIGH Voltage V
OH1
V
CC
> 3.3V, I
OH
= -1.0mA V
CC
- 0.8 V
Output HIGH Voltage V
OH2
2V < V
CC
3.3V, I
OH
= -0.4mA V
CC
- 0.4 V
Output HIGH Voltage V
OH3
V
CC
2V, I
OH
= -0.25mA V
CC
- 0.2 V
Reset Output LOW Voltage V
OLS
I
OL
= 1mA 0.4 V
Capacitance T
A
= +25°C, f = 1MHz, V
CC
= 5V
SYMBOL TEST CONDITIONS MAX UNIT
C
OUT
(Note 2) Output Capacitance (SO, RESET/RESET) V
OUT
= 0V 8 pF
C
IN
(Note 2) Input Capacitance (SCK, SI, CS, WP)V
IN
= 0V 6 pF
NOTES:
1. V
IL
min and V
IH
max are for reference only and are not tested.
2. This parameter is periodically sampled and not 100% tested.
X5323, X5325
11
FN8131.3
December 9, 2015
Equivalent AC Load Circuit at 5V V
CC
Serial Input Timing
AC Test Conditions
Input pulse levels V
CC
x 0.1 to V
CC
x 0.9
Input rise and fall times 10ns
Input and output timing level V
CC
x 0.5
AC Electrical Specifications Input pulse levels = V
CC
x 0.1 to V
CC
x 0.9; input rise and fall times = 10ns; input and ouput timing
level = V
CC
x 0.5. Over recommended operating conditions, unless otherwise specified.
PARAMETER SYMBOL
2.7 TO 5.5V
UNITMIN MAX
SERIAL INPUT TIMING
Clock Frequency f
SCK
02MHz
Cycle Time t
CYC
500 ns
CS
Lead Time t
LEAD
250 ns
CS Lag Time t
LAG
250 ns
Clock HIGH Time t
WH
200 ns
Clock LOW Time t
WL
250 ns
Data Set-up Time t
SU
50 ns
Data Hold Time t
H
50 ns
Input Rise Time t
RI
(Note 3) 100 ns
Input Fall Time t
FI
(Note 3) 100 ns
CS
Deselect Time t
CS
500 ns
Write Cycle Time t
WC
(Note 4) 10 ms
SCK
CS
SI
SO
MSB IN
t
SU
t
RI
t
LAG
t
LEAD
t
H
LSB IN
t
CS
t
FI
HIGH IMPEDANCE
X5323, X5325
12
FN8131.3
December 9, 2015
Serial Output Timing
Power-Up and Power-Down Timing
Serial Output Timing
PARAMETER SYMBOL
2.7 TO 5.5V
UNITMIN MAX
Clock Frequency f
SCK
02MHz
Output Disable Time t
DIS
250 ns
Output Valid From Clock Low t
V
250 ns
Output Hold Time t
HO
0ns
Output Rise Time t
RO
(Note 3) 100 ns
Output Fall Time t
FO
(Note 3) 100 ns
NOTES:
3. This parameter is periodically sampled and not 100% tested.
4. t
WC
is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile write cycle.
SCK
CS
SO
SI
MSB OUT MSB–1 OUT LSB OUT
ADDR
LSB IN
t
CYC
t
V
t
HO
t
WL
t
WH
t
DIS
t
LAG
RESET (X5323)
RESET (X5323)
V
CC
t
PURST
t
PURST
t
R
t
F
t
RPD
0V
V
TRIP
V
TRIP
X5323, X5325

X5325S8IZ-2.7A

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Supervisory Circuits CPU SUP/WDT 32K SPI EE RST HI 2 7-3 6V
Lifecycle:
New from this manufacturer.
Delivery:
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