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4 Package and PCB thermal data
4.1 PowerSSO-12™ thermal data
Figure 28. PowerSSO-12 PC board
Note: Layout condition of R
th
and Z
th
measurements (PCB: Double layer, Thermal Vias, FR4
area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70µm (front and back side),
Copper areas: from minimum pad lay-out to 8cm
2
).
Figure 29. R
thj-amb
vs. PCB copper area in open box free air condition
30
35
40
45
50
55
60
65
0246810
RTHj_amb(°C/ W)
PCB Cu heatsink area (cm^ 2)
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Figure 30. PowerSSO-12 thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
where = t
P
/T
Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-12
(a)
(a )The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
0,1
1
10
100
0,0001 0,001 0,01 0,1 1 10 100 1000
Time (s)
ZTH (°C/W)
8 cm
2
Footprint
2 cm
2
Z
TH
R
TH
Z
THtp
1 +=
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Table 13. Thermal parameter
Area/island (cm
2
)Footprint28
R1 (°C/W) 0.1
R2 (°C/W) 0.2
R3 (°C/W) 4
R4 (°C/W) 8 8 7
R5 (°C/W) 22 15 10
R6 (°C/W) 26 20 15
C1 (W.s/°C) 0.0001
C2 (W.s/°C) 0.002
C3 (W.s/°C) 0.05
C4 (W.s/°C) 0.2 0.1 0.1
C5 (W.s/°C) 0.27 0.8 1
C6 (W.s/°C) 3 6 9

VN5016AJTR-E

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Gate Drivers Sngl Ch HiSide Drivr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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