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932SQ420DKLFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28
932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
IDT®
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS 16
932SQ420D REV J 010715
SMBus Table: Output Enable Register
Pin # Name Control Function Type 0 1 Defaul
t
Bit 7
DOT96 Enable Output Enable RW Disable-Hi-Z Enable 1
Bit 6
NS_SAS1 Enable Output Enable RW Disable-Hi-Z Enable 1
Bit 5
NS_SAS0 Enable Output Enable RW Disable-Hi-Z Enable 1
Bit 4
NS_SRC1 Enable Output Enable RW Disable-Hi-Z Enable 1
Bit 3
NS_SRC0 Enable Output Enable RW Disable-Hi-Z Enable 1
Bit 2
SRC2 Enable Output Enable RW Disable-Hi-Z Enable 1
Bit 1
SRC1 Enable Output Enable RW Disable-Hi-Z Enable 1
Bit 0
SRC0 Enable Output Enable RW Disable-Hi-Z Enable 1
SMBus Table: Output Enable Register
Pin # Name Control Function Type 0 1 Defaul
t
Bit 7
REF14_3x Enable Output Enable RW Disable-Low Enable 1
Bit 6
0
Bit 5
0
Bit 4
CPU3 Output Enable RW Disable-Hi-Z Enable 1
Bit 3
CPU2 Output Enable RW Disable-Hi-Z Enable 1
Bit 2
CPU1 Output Enable RW Disable-Hi-Z Enable 1
Bit 1
CPU0 Output Enable RW Disable-Hi-Z Enable 1
Bit 0
Spread Spectrum Enable Spread Off/On RW Spread Off Spread On 0
SMBus Table: Output Enable Re
g
ister
Pin # Name Control Function Type 0 1 Defaul
t
Bit 7
0
Bit 6
0
Bit 5
PCI4 Enable Output Enable RW Disable-Low Enable 1
Bit 4
PCI3 Enable Output Enable RW Disable-Low Enable 1
Bit 3
PCI2 Enable Output Enable RW Disable-Low Enable 1
Bit 2
PCI1 Enable Output Enable RW Disable-Low Enable 1
Bit 1
PCI0 Enable Output Enable RW Disable-Low Enable 1
Bit 0
48MHz Enable Output Enable RW Disable-Low Enable 1
SMBus Table: Reserved
Pin # Name Control Function Type 0 1 Defaul
t
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
SMBus Table: Reserved
Pin # Name Control Function Type 0 1 Defaul
t
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Byte 3
Byte 4
60/59
42/41
15
36/35
13
CPU/SRC/
PCI
Byte 2
Byte 1
62/61
54/53
Byte 0
24/25
48/47
44/43
50/49
30/31
34/33
5
56/55
16
17
21
14
RESERVED
RESERVED
932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
IDT®
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS 17
932SQ420D REV J 010715
SMBus Table: Reserved
Pin # Name Control Function Type 0 1 Defaul
t
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
FS4 Freq. Sel 4 RW 0
Bit 3
FS3 Freq. Sel 3 RW 1
Bit 2
FS2 Freq. Sel 2 RW 1
Bit 1
FS1 Freq. Sel 1 RW 1
Bit 0
FS0 Freq. Sel 0 RW 1
SMBus Table: Test Mode and CPU/SRC/PCI Frequenc
y
Select Re
g
ister
Pin # Name Control Function T
y
pe 0 1 Defaul
t
Bit 7
Test Mode Test Mode Type RW Hi-Z REF/N 0
Bit 6
Test Select Select Test Mode RW Disable Enable 0
Bit 5
0
Bit 4
100M_133M# (See note) Frequency Select
R
133MHz 100MHz Latch
Bit 3
FS3 Freq. Sel 3 RW 1
Bit 2
FS2 Freq. Sel 2 RW 0
Bit 1
FS1 Freq. Sel 1 RW 0
Bit 0
FS0 Freq. Sel 0 RW 0
Note: Internal Pull up on 100M_133M# pin will result in default CPU frequency of 100 MHz.
SMBus Table: Vendor & Revision ID Re
g
ister
Pin # Name Control Function T
y
pe 0 1 Defaul
t
Bit 7
RID3
R
0
Bit 6
RID2
R
0
Bit 5
RID1
R
1
Bit 4
RID0
R
1
Bit 3
VID 3
R
0
Bit 2
VID 2
R
0
Bit 1
VID 1
R
0
Bit 0
VID 0
R
1
SMBus Table: Byte Count Register
Pin # Name Control Function T
y
pe 0 1 Defaul
t
Bit 7
BC7 RW 0
Bit 6
BC6 RW 0
Bit 5
BC5 RW 0
Bit 4
BC4 RW 0
Bit 3
BC3 RW 1
Bit 2
BC2 RW 0
Bit 1
BC1 RW 1
Bit 0
BC0 RW 0
SMBus Table: Device ID Register
Pin # Name Control Function T
y
pe 0 1 Defaul
t
Bit 7
DID7
R
--0
Bit 6
DID6
R
--0
Bit 5
DID5
R
--0
Bit 4
DID4
R
--1
Bit 3
DID3
R
--0
Bit 2
DID2
R
--1
Bit 1
DID1
R
--1
Bit 0
DID0
R
--1
0001 for ICS/IDT
0011 for D rev
RESERVED
VENDOR ID
REVISION ID
RESERVED
RESERVED
-
-
-
-
-
-
-
See NS_SAS/NS_SRC
Frequency Table.
Device ID
(17 hex)
Byte Count
Programming b(7:0)
Writing to this register will
configure how many bytes will
be read back, default is A
bytes.
(0 to 9
Byte 8
Byte 9
-
-
-
-
-
-
-
-
RESERVED
-
-
-
Byte 6
Byte 5
Byte 7
-
-
-
-
-
-
-
See CPU/SRC/PCI Frequency
Select Table
-
-
-
-
932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
IDT®
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS 18
932SQ420D REV J 010715
Line
Byte 1,
Bit 0
Spread
Enable
Byte6
Bit3
FS3
Byte6
Bit2
FS2
Byte6
Bit1
FS 1
Byte6
Bit0
FS0
CPU
Speed
for
100MHz
CPU
Speed
for
133MHz
SR C
(MHz)
PCI
(M Hz )
Spread
%
0
0 0 0 0 0 89.97 119.97 89.97 29.99
1
0 0 0 0 1 91.28 121.70 91.28 30.43
2
0 0 0 1 0 92.58 123.44 92.58 30.86
3
0 0 0 1 1 93.75 125.00 93.75 31.25
4
0 0 1 0 0 95.05 126.73 95.05 31.68
5
0 0 1 0 1 96.22 128.30 96.22 32.07
6
0 0 1 1 0 97.53 130.03 97.53 32.51
7
0 0 1 1 1 98.83 131.77 98.83 32.94
8
0
1 0 0 0 100.00 133.33 100.00 33.33
9
0 1 0 0 1 101.30 135.07 101.30 33.77
10
0 1 0 1 0 102.47 136.63 102.47 34.16
11 0
1 0 1 1 103.78 138.37 103.78 34.59
12
0 1 1 0 0 105.08 140.10 105.08 35.03
13
0 1 1 0 1 106.25 141.67 106.25 35.42
14
0 1 1 1 0 107.55 143.40 107.55 35.85
15
0 1 1 1 1 110.03 146.70 110.03 36.68
16
1 0 0 0 0 89.97 119.97 89.97 29.99
17
1 0 0 0 1 91.28 121.70 91.28 30.43
18
1 0 0 1 0 92.58 123.44 92.58 30.86
19
1 0 0 1 1 93.75 125.00 93.75 31.25
20
1 0 1 0 0 95.05 126.73 95.05 31.68
21
1 0 1 0 1 96.22 128.30 96.22 32.07
22
1 0 1 1 0 97.53 130.03 97.53 32.51
23
1 0 1 1 1 98.83 131.77 98.83 32.94
24
1 1 0 0 0 100.00 133.33 100.00 33.33
25
1 1 0 0 1 101.30 135.07 101.30 33.77
26
1 1 0 1 0 102.47 136.63 102.47 34.16
27
1 1 0 1 1 103.78 138.37 103.78 34.59
28
1 1 1 0 0 105.08 140.10 105.08 35.03
29
1 1 1 0 1 106.25 141.67 106.25 35.42
30
1 1 1 1 0 107.55 143.40 107.55 35.85
31
1 1 1 1 1 110.03 146.70 110.03 36.68
CPU/SR C/PCI Frequency Selection Table
0%
-0.5%
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P28

932SQ420DKLFT

Mfr. #:
Buy 932SQ420DKLFT
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner CK420BQ
Lifecycle:
New from this manufacturer.
Delivery:
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