932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
IDT®
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS 4
932SQ420D REV J 010715
Pin Descriptions - 64 TSSOP(cont.)
41 NS_SRC0C OUT
Complementary clock of differential non-spreading SRC output. The se are current mode outputs and externa l
33 ohm series resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
42 NS_SRC0T OUT
True clock of differential non-spreading SRC output. These are current mode outputs. These are current
mode outputs and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for te rmination.
43 NS_SRC1C OUT
Complementary clock of differential non-spreading SRC output. The se are current mode outputs and externa l
33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
44 NS_SRC1T OUT
True clock of differential non-spreading SRC output. These are current mode outputs. Th ese are current
mode outputs and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for te rmination.
45 VDDNS PWR 3.3V power for the Non-Spreading differential outputs outputs and logic
46 GNDNS PWR Ground pin for non-spreading differential outputs and logic.
47 NS_SAS0C OUT
Complementary clock of differentia non-spreading SAS output. These are current mode outputs and external
33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
48 NS_SAS0T OUT
True clock of differential non-spreading SAS output. These are curren t mode outputs. These are current
mode outputs and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for te rmination.
49 NS_SAS1C OUT
Complementary clock of differential non-spreading SAS output. These are current mode outputs and external
33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
50 NS_SAS1T OUT
True clock of differential non-spreading SAS output. These are curren t mode outputs. These are current
mode outputs and external 33 ohm series resistors and 49.9 ohm shunt resistors are required for te rmination.
51 AVDD_NS_SAS PWR 3.3V
p
ower for the non-s
p
readin
g
SAS/SRC PLL analo
g
circuits.
52 GNDNS PWR Ground
p
in for non-s
p
readin
g
differential out
p
uts and lo
g
ic.
53 CPU0C OUT
Complementary clock of differential CPU output. These are current mode outputs and external 33 ohm series
resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
54 CPU0T OUT
True clock of differential CPU outp ut. These are current mode outputs and external 33 ohm series resistors
and 49.9 ohm shunt resistors are re
q
uired for termination.
55 CPU1C OUT
Complementary clock of differential CPU output. These are current mode outputs and external 33 ohm series
resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
56 CPU1T OUT
True clock of differential CPU outp ut. These are current mode outputs and external 33 ohm series resistors
and 49.9 ohm shunt resistors are re
q
uired for termination.
57 VDDCPU PWR 3.3V
p
ower for the CPU out
p
uts and lo
g
ic
58 GNDCPU PWR Ground pin for CPU outputs and logic.
59
CPU2C
OUT
Complementary clock of differential CPU output. These are current mode outputs and external 33 ohm series
resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
60 CPU2T OUT
True clock of differential CPU outp ut. These are current mode outputs and external 33 ohm series resistors
and 49.9 ohm shunt resistors are re
q
uired for termination.
61 CPU3C OUT
Complementary clock of differential CPU output. These are current mode outputs and external 33 ohm series
resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
62 CPU3T OUT
True clock of differential CPU outp ut. These are current mode outputs and external 33 ohm series resistors
and 49.9 ohm shunt resistors are re
q
uired for termination.
63 VDDCPU PWR 3.3V power for the CPU outputs and logic
64 SMBDAT I/O Data pin of SMBUS circuitry, 5V tolerant
932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
IDT®
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS 5
932SQ420D REV J 010715
Pin Configuration - 64 MLF
VDDXTAL
X2_25
X1_25
GN DXTAL
GND14
vREF14_3x/TEST_SEL
VDD14
AVDD14
GND14
SMBCLK
SMBDAT
VDDCPU
CPU3T
CPU3C
CPU2T
CPU2C
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
GNDPCI
1
48
GNDCPU
VDDPCI
2 47 VDDCPU
PCI4_2x
346
CPU1T
PCI3_2x
4
45
CPU1C
PCI2_2x
544CPU0T
PCI1_2x
6
43
CPU0C
PCI0_2x
742GNDNS
GNDPCI
8 41 AVDD _NS_SAS
VDDPCI
9 40 NS_SAS1T
VD D48
10 39 NS_SAS1C
^48M_2x/100M_133M#
11 38 NS_SAS0T
GN D48
12 37 NS_SAS0C
GN D96
13 36
GNDNS
DOT96T
14 35
VDDNS
DOT96C
15 34
NS_SRC1T
AVD D96
16 33
NS_SRC1C
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
TEST_MODE
CKPWRGD#/PD
VDDSRC
SRC0T
SRC0C
GNDSRC
SRC1C
SRC1T
SRC2C
SRC2T
VDDSRC
AVDD_SRC
GNDSRC
IREF
NS_SRC0C
NS_SRC0T
Note: Pins with ^ prefix have internal 120K pullup
Pins with v prefix have internal 120K pulldowm
932SQ420
932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
IDT®
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS 6
932SQ420D REV J 010715
Pin Descriptions - 64 MLF
PIN # PIN NAM E TYPE D ESC RIPTION
1 GNDPCI PWR Ground pin for PCI outputs and logic.
2 VDDPCI PWR 3.3V power for the PCI o utput s and logic
3 PCI4_2 x OUT 3.3V PCI clock output
4 PCI3_2 x OUT 3.3V PCI clock output
5 PCI2_2 x OUT 3.3V PCI clock output
6 PCI1_2 x OUT 3.3V PCI clock output
7 PCI0_2 x OUT 3.3V PCI clock output
8 GNDPCI PWR Ground pin for PCI outputs and logic.
9 VDDPCI PWR 3.3V power for the PCI o utput s and logic
10 VDD48 PWR 3.3V power for the 48MHz output and logic
11 ^48M_2x/100M_133M# I/O
3.3V 48MHz output/ 3.3V tolerant CPU f requency select latched input pin. See VilFS and VihFS values for
thresholds. This pin has a weak (~120Kom) internal pull up.
1 = 100MHz
,
0 = 133MHz o
p
eratin
g
fre
q
uenc
y
12 GND48 PWR Ground
p
in for 48MHz out
p
ut and lo
g
ic.
13 GND96 PWR Ground
p
in for DOT96 out
p
ut and lo
g
ic.
14 DOT96T OUT
True clock of differential 96MHz output. These are current mode outputs. These are current mode outputs
and external 33 ohm series resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
15 DOT96C OUT
Complementary clock of d ifferential 96MHz output. These are current mode outputs and e xternal 33 ohm
series resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
16 AVDD96 PWR 3.3V
p
ower for the 48/96MHz PLL and the 9 6MHz out
p
ut and lo
g
ic
17 TEST_MODE IN
TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test mode. Refer to
Test Clarification Table.
18 CKPWRGD#/PD IN
CKPWRGD# is an active low input used to sample latched inputs and allow the device to Power Up. PD is an
asynchronous active high input pin used to put the device into a low power state. The internal clocks and PLLs
are sto
pp
ed.
19 VDDSRC PWR 3.3V power for the SRC outputs and logic
20 SRC0T OUT
True clock of differential SRC output. These are current mode outputs. These are current mode outputs and
external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
21 SRC0C OUT
Complementary clock of differential SRC output. These are current mode outputs and external 33 ohm
series resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
22 GNDSRC PWR Ground pin for SRC outputs and logic.
23 SRC1C OUT
Complementary clock of differential SRC output. These are current mode o utputs and external 33 ohm series
resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
24 SRC1T OUT
True clock of differential SRC output. These are current mode outputs. These are current mode outputs and
external 33 ohm series resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
25 SRC2C OUT
Complementary clock of differential SRC output. These are current mode o utputs and external 33 ohm series
resistors and 49.9 ohm shunt resistors are required for termination.
26 SRC2T OUT
True clock of differential SRC output. These are current mode outputs. These are current mode outputs and
external 33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
27 VDDSRC PWR 3.3V power for the SRC outputs and logic
28 AVDD_SRC PWR 3.3V power for the SRC PLL analog circuits
29 GNDSRC PWR Ground pin for SRC outputs and logic.
30 IREF OUT
This pin establishes the reference current for the differential current-mode output pairs. This pin requires a
fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the standard
va lue .
31 NS_SRC0C OUT
Complementary clock of differential non-spreading SRC output. These are current mode outputs and external
33 ohm series resistors and 49.9 ohm shunt resistors are required for termination.
32 NS_SRC0T OUT
True clock of differential non-spreading SRC out put. Th ese are current mode outputs. These are current
mode outputs and external 33 ohm series re sistors and 49.9 ohm shunt resistors are required for termination.
33 NS_SRC1C OUT
Complementary clock of differential non-spreading SRC output. These are current mode outputs and external
33 ohm series resistors and 49.9 ohm shunt resistors are re
q
uired for termination.
34 NS_SRC1T OUT
True clock of differential non-spreading SRC output. These are current mode outputs. These are current
mode outputs and external 33 ohm series re sistors and 49.9 ohm shunt resistors are required for termination.

932SQ420DKLFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner CK420BQ
Lifecycle:
New from this manufacturer.
Delivery:
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