14
FN6831.0
February 4, 2009
inductor current, the phase voltage will be positive with
respect to the GND and PGND pins. The ISL62386 monitors
the phase voltage when the low-side MOSFET is conducting
inductor current to determine its direction.
When the output load current is greater than or equal to ½
the inductor ripple current, the inductor current is always
positive, and the converter is always in CCM. The ISL62386
minimizes the conduction loss in this condition by forcing the
low-side MOSFET to operate as a synchronous rectifier.
When the output load current is less than ½ the inductor
ripple current, negative inductor current occurs. Sinking
negative inductor current through the low-side MOSFET
lowers efficiency through unnecessary conduction losses.
The ISL62386 automatically enters DEM after the PHASE
pin has detected positive voltage and LGATE was allowed to
go high for eight consecutive PWM switching cycles. The
ISL62386 will turn off the low-side MOSFET once the phase
voltage turns positive, indicating negative inductor current.
The ISL62386 will return to CCM on the following cycle after
the PHASE pin detects negative voltage, indicating that the
body diode of the low-side MOSFET is conducting positive
inductor current.
Efficiency can be further improved with a reduction of
unnecessary switching losses by reducing the PWM
frequency. It is characteristic of the R
3
architecture for the
PWM frequency to decrease while in diode emulation. The
extent of the frequency reduction is proportional to the
reduction of load current. Upon entering DEM, the PWM
frequency makes an initial step-reduction because of a 33%
step-increase of the window voltage V
W
.
Because the switching frequency in DEM is a function of
load current, very light load conditions can produce
frequencies well into the audio band. This can be
problematic if audible noise is coupled into audio amplifier
circuits. To prevent this from occurring, the ISL62386 allows
the user to float the FCCM input. This will allow DEM at light
loads, but will prevent the switching frequency from going
below ~28kHz to prevent noise injection into the audio band.
A timer is reset each PWM pulse. If the timer exceeds 30µs,
LGATE is turned on, causing the ramp voltage to reduce until
another UGATE is commanded by the voltage loop.
Overcurrent Protection
The overcurrent protection (OCP) setpoint is programmed
with resistor, R
OCSET
, that is connected across the OCSET
and PHASE pins.
Figure 26 shows the overcurrent-set circuit for SMPS1. The
inductor consists of inductance L and the DC resistance
(DCR). The inductor DC current I
L
creates a voltage drop
across DCR, given by Equation 6:
The ISL62386 sinks a 10µA current into the OCSET1 pin,
creating a DC voltage drop across the resistor R
OCSET
,
given by Equation 7:
Resistor R
O
is connected between the ISEN1 pin and the
actual output of the converter. During normal operation, the
ISEN1 pin is a high impedance path, therefore there is no
voltage drop across R
O
. The DC voltage difference between
the OCSET1 pin and the ISEN1 pin can be established using
Equation 8:
The ISL62386 monitors the OCSET1 pin and the ISEN1 pin
voltages. Once the OCSET1 pin voltage is higher than the
ISEN1 pin voltage for more than 10µs, the ISL62386 declares
an OCP fault. The value of R
OCSET
is then written as
Equation 9:
Where:
-R
OCSET
(Ω) is the resistor used to program the
overcurrent setpoint
-I
OC
is the output current threshold that will activate the
OCP circuit
- DCR is the inductor DC resistance
For example, if I
OC
is 20A and DCR is 4.5mΩ, the choice of
R
OCSET
is R
OCSET
= 20Ax4.5mΩ/10µA = 9kΩ.
Resistor R
OCSET
and capacitor C
SEN
form an RC network
to sense the inductor current. To sense the inductor current
correctly, not only in DC operation but also during dynamic
operation, the RC network time constant R
OCSET
C
SEN
needs to match the inductor time constant L/DCR. The value
of C
SEN
is then written as Equation 10:
For example, if L is 1.5µH, DCR is 4.5mΩ, and R
OCSET
is
9kΩ, the choice of C
SEN
= 1.5µH/(9kΩ x 4.5mΩ) = 0.037µF.
Upon converter start-up, the C
SEN
capacitor bias is 0V. To
prevent false OCP during this time, a 10µA current source
V
DCR
I
L
DCR•=
(EQ. 6)
FIGURE 26. OVERCURRENT-SET CIRCUIT
PHASE1
C
O
L
V
O
R
OCSET
C
SEN
OCSET1
ISEN1
R
O
ISL62386
DCR
I
L
10µF
+
_
V
DCR
+
_
V
ROCSET
V
ROCSET
10μAR
OCSET
•=
(EQ. 7)
V
OCSET1
V–
ISEN1
I
L
DCR• 10μAR
OCSET
•–=
(EQ. 8)
(EQ. 9)
R
OCSET
I
OC
DCR•
10μA
---------------------------
=
(EQ. 10)
C
SEN
L
R
OCSET
DCR•
-----------------------------------------
=
ISL62386
