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LTC2360HTS8#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
LTC2360/LTC2361/LTC2362
16
236012fa
SINGLE-ENDED ANALOG INPUT
Driving the Analog Input
The analog input of the LTC2360/LTC2361/LTC2362 is
easy to drive. The input draws only one small current
spike while charging the sample-and-hold capacitor with
the ADC going into track mode. During the conversion,
the analog input draws only a small leakage current. If
the source impedance of the driving circuit is low, then
the input of the LTC2360/LTC2361/LTC2362 can be driven
directly. As source impedance increases, so will acquisi-
tion time. For minimum acquisition time with high source
impedance, a buffer amplifi er should be used. The main
requirement is that the amplifi er driving the analog input
must settle after the small current spike before the next
conversion starts (settling time must be less than t
ACQ
for full throughput rate). While choosing an input ampli-
fi er, also keep in mind the amount of noise and harmonic
distortion the amplifi er contributes.
Choosing an Input Amplifi er
Choosing an input amplifi er is easy if a few requirements
are taken into consideration. First, to limit the magnitude
of the voltage spike seen by the amplifi er from charging
the sampling capacitor, choose an amplifi er that has a low
output impedance (<100Ω) at the closed-loop bandwidth
frequency. For example, if an amplifi er is used in a gain
of 1 and has a unity-gain bandwidth of 10MHz, then the
output impedance at 10MHz must be less than 100Ω. The
second requirement is that the closed-loop bandwidth must
be greater than 8MHz to ensure adequate small-signal
settling for full throughput rate. If slower op amps are
used, more time for settling can be provided by increasing
the time between conversions. The best choice for an op
amp to drive the LTC2360/LTC2361/LTC2362 will depend
on the application. Generally, applications fall into two
categories: AC applications where dynamic specifi cations
are most critical and time domain applications where DC
accuracy and settling time are most critical. The follow-
ing list is a summary of the op amps that are suitable for
driving the LTC2360/LTC2361/LTC2362. (More detailed
information is available on the Linear Technology website at
www.linear.com.)
LTC1566-1: Low Noise 2.3MHz Continuous Time Low-
pass Filter.
LT
®
1630: Dual 30MHz Rail-to-Rail Voltage FB Amplifi er.
2.7V to ±15V supplies. Very high A
VOL
, 500µV offset and
520ns settling to 0.5LSB for a 4V swing. THD and noise
are –93dB to 40kHz and below 1LSB to 320kHz (A
V
=
1, 2V
P-P
into 1k, V
S
= 5V), making the part excellent for
AC applications (to 1/3 Nyquist) where rail-to-rail perfor-
mance is desired. Quad version is available as LT1631.
LTC6241: Dual 18MHz, Low Noise, Rail-to-Rail, CMOS
Voltage FB Amplifi er. 2.8V to 6V supplies. Very high A
VOL
and 125µV offset. It is suitable for applications with a single
5V supply. Quad version is available as LTC6242.
LT1797: Unity-Gain Stable 10MHz, Rail-to-Rail Voltage
Feedback Amplifi er.
LT1801: 180MHz GBWP, –75dBc at 500kHz, 2mA/Ampli-
fi er, 8.5nV/√Hz.
LT6203: 100MHz GBWP, –80dBc Distortion at 1MHz, Unity-
Gain Stable, R-R In and Out, 3mA/Amplifi er, 1.9nV/√Hz.
APPLICATIONS INFORMATION
RECOMMENDED HIGH OR LOW
Hi-Z STATE
236012 F13
B11
CONV
SCK
SDO
12349101112
B10 B9 B3 B2 B1 B0
DATA TRANSFER
ACQUIRE
INPUT
EXECUTE CONVERSION
EXECUTING A DUMMY CONVERSION AND
PUT THE DEVICE INTO SLEEP MODE
t
DATA
t
CONV
t
CONV
t
ACQ
SLEEP MODE
t
THROUGHPUT
= t
ACQ
+ 2 • t
CONV
+ t
DATA
+ t
SLEEPMODE
RECOMMENDED HIGH OR LOW
Figure 13. Minimize the Time When the Device Draws Power, While the Conversion Results are Available Right After Conversion
LTC2360/LTC2361/LTC2362
17
236012fa
Input Filtering and Source Impedance
The noise and the distortion of the input amplifi er and
other circuitry must be considered since they will add to
the LTC2360/LTC2361/LTC2362 noise and distortion. The
small-signal bandwidth of the sample-and-hold circuit is
10MHz. Any noise or distortion products that are pres-
ent at the analog inputs will be summed over this entire
bandwidth. Noisy input circuitry should be fi ltered prior
to the analog inputs to minimize noise. A simple 1-pole
RC fi lter is suffi cient for many applications. For example,
Figure 14 shows a 220pF capacitor from A
IN
to ground
and a 51Ω source resistor to limit the input bandwidth
to 10MHz. The 220pF capacitor also acts as a charge
reservoir for the input sample-and-hold and isolates the
ADC input from sampling-glitch sensitive circuitry. High
quality capacitors and resistors should be used since these
components can add distortion. NPO and silvermica type
dielectric capacitors have excellent linearity. Carbon surface
mount resistors can generate distortion from self heating
and from damage that may occur during soldering. Metal
fi lm surface mount resistors are much less susceptible to
both problems. When high amplitude unwanted signals
are close in frequency to the desired signal frequency,
a multiple pole fi lter is required. High external source
resistance, combined with the 20pF of input capacitance,
will reduce the rated 10MHz bandwidth and increase
acquisition time beyond 500ns.
APPLICATIONS INFORMATION
Reference Input
On the TS8 package of the LTC2360/LTC2361/LTC2362,
the voltage on the V
REF
pin defi nes the full-scale range
of the ADC. The reference voltage can range from V
DD
down to 1.4V.
Input Range
The analog input of the LTC2360/LTC2361/LTC2362 is
driven single-ended with respect to GND from a single
supply. The input may swing up to V
DD
for the S6 package
and to V
REF
for the TS8 package. The 0V to 2.5V range is
also ideally suited for single-ended input use with V
DD
or
V
REF
= 2.5V for single supply applications. If the difference
between the A
IN
input and GND exceeds V
DD
for the S6
package or V
REF
for the TS8 package, the output code will
stay fi xed at all ones, and if this difference goes below 0V,
the output code will stay fi xed at all zeros.
Figure 15 shows the ideal input/output characteristics for
the LTC2360/LTC2361/LTC2362. The code transitions oc-
cur midway between successive integer LSB values (i.e.,
0.5LSB, 1.5LSB, 2.5LSB, …, FS – 1.5LSB). The output
code is straight binary with 1LSB = V
DD
/4096 for the S6
package and 1LSB = V
REF
/4096 for the TS8 package.
V
DD
GND
A
IN
CONV
SDO
SCK
1
2
3
6
5
4
LTC2362
220pF
51
2.2µF
236012 F14
Figure 14. RC Input Filter
INPUT VOLTAGE (V)
0
1LSB
UNIPOLAR OUTPUT CODE
111...111
111...110
236012 F15
000...001
000...000
FS – 1LSB
Figure 15. Transfer Characteristics
LTC2360/LTC2361/LTC2362
18
236012fa
APPLICATIONS INFORMATION
BOARD LAYOUT AND BYPASSING
Wire wrap boards are not recommended for high resolution
and/or high speed A/D converters. To obtain the best per-
formance from the LTC2360/LTC2361/LTC2362, a printed
circuit board with ground plane is required. Layout for the
printed circuit board should ensure that digital and analog
signal lines are separated as much as possible. In particular,
care should be taken not to run any digital track alongside
an analog signal track or underneath the ADC. The analog
input should be screened by the ground plane.
High quality tantalum and ceramic bypass capacitors
should be used at the V
DD
pin as shown in the Block
Diagram on the fi rst page of this data sheet. For optimum
performance, a 2.2µF surface mount AVX capacitor with
a 0.1µF ceramic is recommended for the V
DD
and V
REF
pins. Alternatively, 2.2µF ceramic chip capacitors such as
Murata GRM235Y5V106Z016 may be used. The capacitors
must be located as close to the pins as possible. The traces
connecting the pins and the bypass capacitors must be
kept short and should be made as wide as possible.
Figure 16 shows the recommended system ground con-
nections. All analog circuitry grounds should be terminated
at the LTC2360/LTC2361/LTC2362. The ground return
from the LTC2360/LTC2361/LTC2362 to the power supply
should be low impedance for noise free operation. Digital
circuitry grounds must be connected to the digital supply
common.
In applications where the ADC data outputs and control sig-
nals are connected to a continuously active microprocessor
bus, it is possible to get errors in the conversion results.
These errors are due to feedthrough from the micropro-
cessor to the successive approximation comparator. The
problem can be eliminated by forcing the microprocessor
into a wait state during conversion or by using three-state
buffers to isolate the ADC data bus.
Figure 16. Power Supply Ground Practice
236012 F16
GND
A
IN
V
DD
CA
IN
CONV
SDO
SCK
CV
DD
PIN 1
VIAS TO GROUND PLANE
+
2.2μF
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

LTC2360HTS8#TRPBF

Mfr. #:
Buy LTC2360HTS8#TRPBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-bit 100ksps SAR ADC in TSOT-8
Lifecycle:
New from this manufacturer.
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