NCV7361A
http://onsemi.com
18
APPLICATION HINTS
LIN System Parameter
Bus Loading Requirements
Parameter Symbol Min Typ Max Unit
Operating Voltage Range V
BAT
8.0 − 18 V
Voltage Drop of Reverse Protection Diode V
Drop_rev
0.4 0.7 1.0 V
Voltage Drop at the Series Diode in Pull Up Path V
SerDiode
0.4 0.7 1.0 V
Battery Shift Voltage V
Shift_BAT
0 − 0.1 V
BAT
Ground Shift Voltage V
Shift_GND
0 − 0.1 V
BAT
Master Termination Resistor R
master
900 1000 1100 W
Slave Termination Resistor R
slave
20 30 60 kW
Number of System Nodes N 2 − 16 −
Total Length of Bus Line LEN
BUS
− − 40 m
Line Capacitance C
LINE
− 100 150 pF/m
Capacitance of Master Node C
Master
− 220 − pF
Capacitance of Slave Node C
Slave
− 220 250 pF
Total Capacitance of the Bus including Slave and Master Capacitance C
BUS
1.0 4.0 10 nF
Network Total Resistance R
Network
537 − 863 W
Time Constant of Overall System t 1.0 − 5.0 ms
Recommendations for System Design
The goal of the LIN physical layer standard is to have a
universal definition of the LIN system for plug and play
solutions in LIN networks up to 20 kbd bus speeds.
In case of small and medium LIN networks, it’s
recommended to adjust the total network capacitance to at
least 4.0 nF for good EMC and EMI behavior. This can be
done by setting only the master node capacitance. The
slave node capacitance should have a unit load of typically
220 pF for good EMC/EMI behavior.
In large networks with long bus lines and the maximum
number of nodes, some system parameters can exceed the
defined limits and the LIN system designer must intervene.
The whole capacitance of a slave node is not only the unit
load capacitor itself. Additionally, there is the capacitance
of wires and connectors, and the internal capacitance of the
LIN transmitter. This internal capacitance is strongly
dependent on the technology of the IC manufacturer and
should be in the range of 30 pF to 150 pF. If the bus lines
have a total length of nearly 40m, the total bus capacitance
can exceed the LIN system limit of 10 nF.
A second parameter of concern is the integrated slave
termination resistor tolerance. If most of the slave nodes
have a slave termination resistance near by the allowed
maximum of 60 kW, the total network resistance is more
than 700 W. Even if the total network capacitance is below
or equal to the maximum specified value of 10 nF, the
network time constant is higher than 7.0 ms.
This problem can be solved only by adjusting the master
termination resistor to the required maximum network time
constant of 5.0 ms (max).
The LIN bus output driver of the NCV7361A provides a
higher drive capability than necessary (40 mA @ 1.2 V)
within the LIN standard (33.6 mA @ 1.2 V). With this
driver stage the system designer can increase the maximum
LIN networks with a total network capacitance of more
than 10 nF. The total network resistance can be
decreased to:
R
tl_min
+ (V
Bat_max
* V
BUSdom
)ńI
BUS_max
+ (18 V * 1.2 V)ń40 mA + 420 W
NOTE: The NCV7361A meets the requirements for
implementation in RC−based slave nodes. The LIN
Protocol Specification requires the deviation of the slave
node clock to the master node clock after synchronization
must not differ by more than "2%.
Setting the network time constant is necessary in large
networks (primary resistance) and also in small networks
(primary capacitance).
