Micrel MICRF505BML/YML
August 2006 36
M9999-092904
+1 408-944-0800
Overview of programming bit
Address Data
A6..A0 D7 D6 D5 D4 D3 D2 D1 D0
0000000
LNA_by PA2 PA1 PA0 Sync_en Mode1 Mode0 Load_en
0000001
Modulation1 Modulation0
OL_opamp_en
(“0”)
PA_LDc_en
(”0”)
RSSI_en LD_en PF_FC1 PF_FC0
0000010
CP_HI SC_by
VCO_by
(“0”)
PA_by OUTS3 OUTS2 OUTS1 OUTS0
0000011
IFBias_s
(“1”)
IFA_HG
(“1”)
VCO_BIAS_s
(“0”)
VCO_IB2 VCO_IB1 VCO_IB0 VCO_freq1 VCO_freq0
0000100
Mod_F2 Mod_F1 Mod_F0 Mod_I4 Mod_I3 Mod_I2 Mod_I1 Mod_I0
0000101
- -
Mod_FHG
(“0”)
Mod_shape
(“1”)
Mod_A3 Mod_A2 Mod_A1 Mod_A0
0000110
- Mod_clkS2 Mod_clkS1 Mod_clkS0 BitSync_clkS2 BitSync_clkS1 BitSync_clkS0 BitRate_clkS2
0000111
BitRate_clkS1 BitRate_clkS0 RefClk_K5 RefClk_K4 RefClk_K3 RefClk_K2 RefClk_K1 RefClk_K0
0001000
SC_HI
(“1”)
ScClk_X2
(“1”)
ScClk5 ScClk4 ScClk3 ScClk2 ScClk1 ScClk0
0001001
PrescalMode_s
(“0”)
Prescal_s
(“0”)
XCOAR_en
(”1”)
XCOtune4 XCOtune3 XCOtune2 XCOtune1 XCOtune0
0001010
- - A0_5 A0_4 A0_3 A0_2 A0_1 A0_0
0001011
- - - - N0_11 N0_10 N0_9 N0_8
0001100
N0_7 N0_6 N0_5 N0_4 N0_3 N0_2 N0_1 N0_0
0001101
- - - - M0_11 M0_10 M0_9 M0_8
0001110
M0_7 M0_6 M0_5 M0_4 M0_3 M0_2 M0_1 M0_0
0001111
- - A1_5 A1_4 A1_3 A1_2 A1_1 A1_0
0010000
- - - - N1_11 N1_10 N1_9 N1_8
0010001
N1_7 N1_6 N1_5 N1_4 N1_3 N1_2 N1_1 N1_0
0010010
- - - - M1_11 M1_10 M1_9 M1_8
0010011
M1_7 M1_6 M1_5 M1_4 M1_3 M1_2 M1_1 M1_0
0010100
Div2_HI
(“1”)
LO_IB1
(“0”)
LO_IB0
(“1”)
PA_IB4
(”1”)
PA_IB3
(”0”)
PA_IB2
(”1”)
PA_IB1
(”0”)
PA_IB0
(“1”)
0010101
- - - - FEEC_3 FEEC_2 FEEC_1 FEEC_0
0010110
FEE_7 FEE_6 FEE_5 FEE_4 FEE_3 FEE_2 FEE_1 FEE_0
Table 1: Detailed description of programming bit
ADR # BIT # NAME DESCRIPTION COMMENTS
0000000 7 By_LNA LNA bypass on/off
6 PA2 Power amplifier level, 3.bit Ref. Table 6
5 PA1 Power amplifier level, 2.bit Ref. Table 6
4 PA0 Power amplifier level, 1.bit Ref. Table 6
3 Sync_en Synchronizer Mode bit Ref. Table 3
2 Mode1 Main Mode selection 2. Bit Ref. Table 2
1 Mode0 Main Mode selection 1. Bit Ref. Table 2
0 Load_en Load generation (1=enable)
0000001 7 Modulation1 Modulation selection 2.bit Ref. Table 4
6 Modulation0 Modulation selection 1.bit Ref. Table 4
5 OL_opamp_en “0” mandatory. Opamp in OpenLoop circuit (0=disable)
4 PA_LDc_en
“0” mandatory. PA controlled by Lock Detect
(0=disable)
Ref. Table 6
3 RSSI_en RSSI function (1=enable)
