22
LT3431
sn3431 3431fs
Figure 11. Overall Loop Response
FREQUENCY (Hz)
GAIN (dB)
80
60
40
20
0
–20
–40
PHASE (DEG)
180
150
120
90
60
30
0
3431 F11
GAIN
PHASE
10
V
IN
= 12V
V
OUT
= 5V
I
LOAD
= 1A
C
OUT
= 100µF, 10V, 0.1Ω
1k 10k 1M100 100k
R
C
= 3.3k
C
C
= 22nF
C
F
= 220pF
Figure 12. Dual Source Supply with 25µA Reverse Leakage
tantalum output capacitor with a ceramic output capacitor
because of its very low ESR. The zero provided by the
tantalum output capacitor must now be reinserted back
into the loop. Alternatively there may be cases where, even
with the tantalum output capacitor, an additional zero is
required in the loop to increase phase margin for improved
transient response.
A zero can be added into the loop by placing a resistor, R
C,
at the V
C
pin in series with the compensation capacitor, C
C
or by placing a capacitor, C
FB
, between the output and the
FB pin.
a capacitor, C
FB
, can be inserted between the output and
FB pin but care must be taken for high output voltage
applications. Sudden shorts to the output can create
unacceptably large negative transients on the FB pin.
For V
IN
-to-V
OUT
ratios <4, higher loop bandwidths are
possible by readjusting the frequency compensation com-
ponents at the V
C
pin.
When checking loop stability, the circuit should be oper-
ated over the application’s full voltage, current and
temperature range. Proper loop compensation may be
obtained by empirical methods as described in detail in
Application Notes 19 and 76.
CONVERTER WITH BACKUP OUTPUT REGULATOR
In systems with a primary and backup supply, for ex-
ample, a battery powered device with a wall adapter input,
the output of the LT3431 can be held up by the backup
supply with the LT3431 input disconnected. In this condi-
tion, the SW pin will source current into the V
IN
pin. If the
SHDN pin is held at ground, only the shut down current of
30µA will be pulled via the SW pin from the second supply.
With the SHDN pin floating, the LT3431 will consume its
quiescent operating current of 1.5mA. The V
IN
pin will also
source current to any other components connected to the
input line. If this load is greater than 10mA or the input
could be shorted to ground, a series Schottky diode must
be added, as shown in Figure 12. With these safeguards,
the output can be held at voltages up to the V
IN
absolute
maximum rating.
APPLICATIO S I FOR ATIO
WUUU
When using R
C
, the maximum value has two limitations.
First, the combination of output capacitor ESR and R
C
may
stop the loop rolling off altogether. Second, if the loop gain
is not rolled sufficiently at the switching frequency, output
ripple will perturb the V
C
pin enough to cause unstable
duty cycle switching similar to subharmonic oscillation. If
needed, an additional capacitor (C
F
) can be added across
the R
C
/C
C
network from V
C
pin to ground to further
suppress V
C
ripple voltage.
With a tantalum output capacitor, the LT3431 already
includes a resistor, R
C
and filter capacitor, C
F
, at the V
C
pin
(see Figures 10 and 11) to compensate the loop over the
entire V
IN
range (to allow for stable pulse skipping for high
V
IN
-to-V
OUT
ratios ≥4). A ceramic output capacitor can still
be used with a simple adjustment to the resistor R
C
for
stable operation. (See Ceramic Capacitors section for
stabilizing LT3431). If additional phase margin is required,
5V, 2A
REMOVABLE
INPUT
C2
0.22µF
C
F
220pF
54k
D1
30BQ060
3431 F12
C3
4.7µF
R
C
3.3k
C
C
0.022µF
D3
30BQ060
D2
MMSD914TI
10µH
C1
100µF
10V
ALTERNATE
SUPPLY
25k
R1
15.4k
R2
4.99k
BOOST
V
IN
LT3431
SHDN
SYNC
SW
BIAS
FB
V
C
GND
+
