PCA9626BS,518 Datasheet PCA9626B,118, PCA9626BS,518 | P7-P9

Product data sheet Rev. 5 — 19 June 2014 7 of 48

NXP Semiconductors

PCA9626

24-bit Fm+ I

C-bus 100 mA 40 V LED driver

7. Functional description

Refer to Figure 1 “Block diagram of PCA9626”.

7.1 Device addresses

Following a START condition, the bus master must output the address of the slave it is

accessing.

There are a maximum of 128 possible programmable addresses using the 7 hardware

address pins. Two of these addresses, Software Reset and LED All Call, cannot be used

because their default power-up state is ON, leaving a maximum of 126 addresses. Using

other reserved addresses, as well as any other Sub Call address, reduces the total

number of possible addresses even further.

7.1.1 Regular I

C-bus slave address

The I

C-bus slave address of the PCA9626 is shown in Figure 3. To conserve power, no

internal pull-up resistors are incorporated on the hardware selectable address pins and

they must be pulled HIGH or LOW externally.

Remark: Using reserved I

C-bus addresses interferes with other devices, but only if the

devices are on the bus and/or the bus is open to other I

C-bus systems at some later

date. In a closed system where the designer controls the address assignment these

addresses can be used since the PCA9626 treats them like any other address. The

LED All Call, Software Rest and PCA9564 or PCA9665 slave address (if on the bus) can

never be used for individual device addresses.

• PCA9626 LED All Call address (1110 000) and Software Reset (0000 0110) which are

active on start-up

• PCA9564 (0000 000) or PCA9665 (1110 000) slave address which is active on

start-up

• ‘reserved for future use’ I

C-bus addresses (0000 011, 1111 1XX)

• slave devices that use the 10-bit addressing scheme (1111 0XX)

• slave devices that are designed to respond to the General Call address (0000 000)

• High-speed mode (Hs-mode) master code (0000 1XX)

The last bit of the address byte defines the operation to be performed. When set to logic 1

a read is selected, while a logic 0 selects a write operation.

Fig 3. Slave address

R/W

002aab319

A6 A5 A4 A3 A2 A1 A0

hardware selectable

slave address

Product data sheet Rev. 5 — 19 June 2014 8 of 48

NXP Semiconductors

PCA9626

24-bit Fm+ I

C-bus 100 mA 40 V LED driver

7.1.2 LED All Call I

C-bus address

• Default power-up value (ALLCALLADR register): E0h or 1110 000

• Programmable through I

C-bus (volatile programming)

• At power-up, LED All Call I

C-bus address is enabled. PCA9626 sends an ACK when

E0h (R/W

= 0) or E1h (R/W = 1) is sent by the master.

See Section 7.3.9 “

ALLCALLADR, LED All Call I

C-bus address” for more detail.

Remark: The default LED All Call I

C-bus address (E0h or 1110 000) must not be used as

a regular I

C-bus slave address since this address is enabled at power-up. All of the

PCA9626s on the I

C-bus acknowledge the address if sent by the I

C-bus master.

7.1.3 LED Sub Call I

C-bus addresses

• 3 different I

C-bus addresses can be used

• Default power-up values:

– SUBADR1 register: E2h or 1110 001

– SUBADR2 register: E4h or 1110 010

– SUBADR3 register: E8h or 1110 100

• Programmable through I

C-bus (volatile programming)

• At power-up, Sub Call I

C-bus addresses are disabled. PCA9626 does not send an

ACK when E2h (R/W

=0) or E3h (R/W= 1), E4h (R/W = 0) or E5h (R/W =1), or

E8h (R/W

= 0) or E9h (R/W = 1) is sent by the master.

See Section 7.3.8 “

SUBADR1 to SUBADR3, I

C-bus subaddress 1 to 3” for more detail.

Remark: The default LED Sub Call I

C-bus addresses may be used as regular I

C-bus

slave addresses as long as they are disabled.

7.1.4 Software Reset I

C-bus address

The address shown in Figure 4 is used when a reset of the PCA9626 must be performed

by the master. The Software Reset address (SWRST Call) must be used with

R/W

= logic 0. If R/W = logic 1, the PCA9626 does not acknowledge the SWRST. See

Section 7.6 “

Software reset” for more detail.

Remark: The Software Reset I

C-bus address is a reserved address and cannot be used

as a regular I

C-bus slave address or as an LED All Call or LED Sub Call address.

Fig 4. Software Reset address

002aab416

0 0 0 0 0 1 1

R/W

Product data sheet Rev. 5 — 19 June 2014 9 of 48

NXP Semiconductors

PCA9626

24-bit Fm+ I

C-bus 100 mA 40 V LED driver

7.2 Control register

Following the successful acknowledgement of the slave address, LED All Call address or

LED Sub Call address, the bus master sends a byte to the PCA9626, which is stored in

the Control register.

The lowest 6 bits are used as a pointer to determine which register is accessed (D[5:0]).

The highest bit is used as Auto-Increment Flag (AIF).

This bit along with the MODE1 register bit 5 and bit 6 provide the Auto-Increment feature.

Bit 6 of the Control register is not used.

When the Auto-Increment Flag is set (AIF = logic 1), the six low-order bits of the Control

program the registers sequentially. Four different types of Auto-Increment are possible,

depending on AI1 and AI0 values of MODE1 register.

[1] AI1 and AI0 come from MODE1 register.

Remark: Other combinations not shown in Table 4 (AIF + AI[1:0] = 001b, 010b, 011b and

111b) are reserved and must not be used for proper device operation.

AIF + AI[1:0] = 000b is used when the same register must be accessed several times

during a single I

C-bus communication, for example, changes the brightness of a single

LED. Data is overwritten each time the register is accessed during a write operation.

AIF + AI[1:0] = 100b is used when all the registers must be sequentially accessed, for

example, power-up programming.

reset state = 80h

Remark: The Control register does not apply to the Software Reset I

C-bus address.

Fig 5. Control register

Table 4. Auto-Increment options

AIF AI1

[1]

AI0

[1]

Function

0 0 0 no Auto-Increment

1 0 0 Auto-Increment for all registers. D[5:0] roll over to 0h after the last register

26h is accessed.

1 0 1 Auto-Increment for individual brightness registers only. D[5:0] roll over to

2h after the last register (19h) is accessed.

1 1 0 Auto-Increment for global control registers and CHASE register. D[5:0]

roll over to 1Ah after the last register (1Ch) is accessed.

1 1 1 Auto-Increment for individual brightness registers; global control registers

and CHASE register. D[5:0] roll over to 2h after the last register (1Ch) is

accessed.

002aad610

AIF X D5 D4 D3 D2 D1 D0

Auto-Increment Flag

Don't care

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PCA9626BS,518

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IC LED DRIVER LINEAR DIM 48HVQFN

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PCA9626BS,518

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