NB3H5150
www.onsemi.com
17
Interfacing from 2.5 V LVPECL to LVDS
Provided that the LVDS receiver can tolerate large input
voltage peak to peak amplitude, the 2.5 V LVPECL output
can be directly interfaced to an LVDS receiver using proper
ECL termination. The 2.5 V LVPECL output will be able to
drive an LVDS receiver with or without internal 100
termination resistor. (See Figures 14, 15 and 16).
Figure 14. Interfacing 2.5 V LVPECL to LVDS with
External 100 W Termination Resistor
R
T
100
LVPECL
2.5 V V
CC
R
E
R
E
’
LVDS
Z
O
Z
O
Figure 15. Interfacing 2.5 V LVPECL to LVDS with
Internal 100 W Termination Resistor
R
T
100
LVPECL
2.5 V V
CC
R
E
R
E
’
LVDS
Z
O
Z
O
Figure 16. PSPICE Simulation Levels of 2.5V LVPECL
to LVDS Interface with Example Resistor Values
1.50 V
0.78 V
720 mV
LVDS
Input
2.5 V LVPECL
Output
Where R
E
= 75
Furthermore, a series termination can be used to reduce
the amplitude of the signal as described in AND8020
application note, by placing R
S
resistor between the driver
and the transmission line. (See Figures 17, 18 and 19).
Figure 17. Interfacing 2.5 V LVPECL to LVDS with
Series R
S
and External 100 W Termination Resistor
R
T
100
LVPECL
2.5 V V
CC
R
E
R
E
’
LVDS
Z
O
Z
O
R
S
R
S
’
Figure 18. Interfacing 2.5 V LVPECL to LVDS with
Series R
S
and Internal 100 W Termination Resistor
LVPECL
2.5 V V
CC
R
E
R
E
LVDS
Z
O
Z
O
R
S
R
S
R
T
100
Figure 19. PSPICE Simulation Levels of 2.5V LVPECL
to LVDS Interface with Series R
S
Resistor
1.30 V
0.87 V
430 mV
LVDS
Input
2.5 V LVPECL
Output
Where R
E
= 75
R
S
= 43
