AD7466/AD7467/AD7468
Rev. C | Page 18 of 28
The conversion result consists of four leading zeros followed by
the MSB of the 12-bit, 10-bit, or 8-bit result from the AD7466,
AD7467, or AD7468, respectively. See the Serial Interface
section. Alternatively, because the supply current required by
the AD7466/AD7467/AD7468 is so low, a precision reference
can be used as the supply source to the devices.
The REF19x series devices are precision micropower, low drop-
out voltage references. For the AD7466/AD7467/AD7468
voltage range operation, the REF193, REF192, and REF191 can
be used to supply the required voltage to the ADC, delivering
3 V, 2.5 V, and 2.048 V, respectively (see
Figure 22). This con-
figuration is especially useful if the power supply is quite noisy
or if the system supply voltages are at a value other than 3 V or
2.5 V (for example, 5 V). The REF19x outputs a steady voltage
to the AD7466/AD7467/AD7468. If the low dropout REF192 is
used when the AD7466 is converting at a rate of 100 kSPS, the
REF192 needs to supply a maximum of 240 μA to the AD7466.
The load regulation of the REF192 is typically 10 ppm/mA
(REF192, V
S
= 5 V), which results in an error of 2.4 ppm (6 μV)
for the 240 μA drawn from it. This corresponds to a 0.0098 LSB
error for the AD7466 with V
DD
= 2.5 V from the REF192. For
applications where power consumption is important, the
automatic power-down mode of the ADC and the sleep mode
of the REF19x reference should be used to improve power
performance. See the
Normal Mode section.
Table 7 provides some typical performance data with various
references used as a V
DD
source under the same setup
conditions. The ADR318, for instance, is a 1.8 V band gap
voltage reference. Its tiny footprint, low power consumption,
and additional shutdown capability make the ADR318 ideal for
battery-powered applications.
Table 7. AD7466 Performance for Voltage Reference IC
Reference Tied to V
DD
AD7466 SNR Performance (dB)
ADR318 @ 1.8 V 70.73
ADR370 @ 2.048 V 70.72
ADR421 @ 2.5 V 71.13
ADR423 @ 3 V 71.44
ANALOG INPUT
An equivalent circuit of the AD7466/AD7467/AD7468 analog
input structure is shown in
Figure 23. The two diodes, D1 and
D2, provide ESD protection for the analog inputs. Care must be
taken to ensure that the analog input signal never exceeds the
supply rails by more than 300 mV. This causes these diodes to
become forward-biased and to start conducting current into the
substrate. Capacitor C1 in
Figure 23 is typically about 4 pF and
can primarily be attributed to pin capacitance. Resistor R1 is a
lumped component made up of the on resistance of a switch.
This resistor is typically about 200 Ω. Capacitor C2 is the ADC
sampling capacitor with a typical capacitance of 20 pF.
C1
4pF
V
IN
V
DD
D2 CONVERSION PHASE—SWITCH OPEN
TRACK PHASE—SWITCH CLOSED
D1
R1
C2
20pF
02643-024
Figure 23. Equivalent Analog Input Circuit
For ac applications, removing high frequency components
from the analog input signal by using a band-pass filter on
the relevant analog input pin is recommended. In applications
where harmonic distortion and signal-to-noise ratio are critical,
the analog input should be driven from a low impedance
source. Large source impedances significantly affect the ac
performance of the ADC. This might necessitate the use of an
input buffer amplifier. The choice of the op amp is a function of
the particular application.
Table 8 provides typical performance data for various op amps
used as the input buffer under constant setup conditions.
Table 8. AD7466 Performance for Input Buffers
Op Amp in the
Input Buffer
AD7466 SNR Performance (dB)
30 kHz Input, V
DD
= 1.8 V
AD8510 70.75
AD8610 71.45
AD797 71.42
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases and performance degrades.
Figure 12 shows a graph of THD vs. analog input signal
frequency for different source impedances when using a supply
voltage of 2.7 V and sampling at a rate of 100 kSPS.
DIGITAL INPUTS
The digital inputs applied to the AD7466/AD7467/AD7468
are not limited by the maximum ratings that limit the analog
inputs. Instead, the digital inputs applied can go to 7 V and are
not restricted by the V
DD
+ 0.3 V limit as on the analog input.
For example, if the AD7466/AD7467/AD7468 are operated with
a V
DD
of 3 V, 5 V logic levels could be used on the digital inputs.
However, the data output on SDATA still has 3 V logic levels
when V
DD
= 3 V. Another advantage of SCLK and
CS
not being
restricted by the V
DD
+ 0.3 V limit is that power supply
sequencing issues are avoided. If
CS
or SCLK is applied before
V
DD
, there is no risk of latch-up as there would be on the analog
inputs if a signal greater than 0.3 V is applied prior to V
DD
.
