AD7466/AD7467/AD7468
Rev. C | Page 5 of 28
AD7467
V
DD
= 1.6 V to 3.6 V, f
SCLK
= 3.4 MHz, f
SAMPLE
= 100 kSPS, unless otherwise noted. T
A
= T
MIN
to T
MAX
, unless otherwise noted.
The temperature range for the B version is −40°C to +85°C.
Table 2.
Parameter B Version Unit Test Conditions/Comments
DYNAMIC PERFORMANCE
Maximum/minimum specifications apply as typical figures
when V
DD
= 1.6 V, f
IN
= 30 kHz sine wave
Signal-to-Noise and Distortion (SINAD) 61 dB min See the Terminology section
Total Harmonic Distortion (THD) −72 dB max See the Terminology section
Peak Harmonic or Spurious Noise (SFDR) −74 dB max See the Terminology section
Intermodulation Distortion (IMD) fa = 29.1 kHz, fb = 29.9 kHz; see the Terminology section
Second-Order Terms −83 dB typ
Third-Order Terms −83 dB typ
Aperture Delay 10 ns typ
Aperture Jitter 40 ps typ
Full Power Bandwidth 3.2 MHz typ @ 3 dB, 2.5 V ≤ V
DD
≤ 3.6 V
1.9 MHz typ @ 3 dB, 1.6 V ≤ V
DD
≤ 2.2 V
750 kHz typ @ 0.1 dB, 2.5 V ≤ V
DD
≤ 3.6 V
450 kHz typ @ 0.1 dB, 1.6 V ≤ V
DD
≤ 2.2 V
DC ACCURACY
Maximum specifications apply as typical figures when
V
DD
= 1.6 V
Resolution 10 Bits
Integral Nonlinearity ±0.5 LSB max See the Terminology section
Differential Nonlinearity ±0.5 LSB max
Guaranteed no missed codes to 10 bits; see the
Terminology section
Offset Error ±0.2 LSB max See the Terminology section
Gain Error ±0.2 LSB max See the Terminology section
Total Unadjusted Error (TUE) ±1 LSB max See the Terminology section
ANALOG INPUT
Input Voltage Ranges 0 to V
DD
V
DC Leakage Current ±1 μA max
Input Capacitance 20 pF typ
LOGIC INPUTS
Input High Voltage, V
INH
0.7 × V
DD
V min 1.6 V ≤ V
DD
< 2.7 V
2 V min 2.7 V ≤ V
DD
≤ 3.6 V
Input Low Voltage, V
INL
0.2 × V
DD
V max 1.6 V ≤ V
DD
< 1.8 V
0.3 × V
DD
V max 1.8 V ≤V
DD
< 2.7 V
0.8 V max 2.7 V ≤ V
DD
≤ 3.6 V
Input Current, I
IN
, SCLK Pin ±1 μA max Typically 20 nA, V
IN
= 0 V or V
DD
Input Current, I
IN
, CS Pin
±1 μA typ
Input Capacitance, C
IN
10 pF max Sample tested at 25°C to ensure compliance
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DD
− 0.2 V min I
SOURCE
= 200 μA, V
DD
= 1.6 V to 3.6 V
Output Low Voltage, V
OL
0.2 V max I
SINK
= 200 μA
Floating-State Leakage Current ±1 μA max
Floating-State Output Capacitance 10 pF max Sample tested at 25°C to ensure compliance
Output Coding
Straight (natural)
binary
CONVERSION RATE
Conversion Time 3.52 μs max 12 SCLK cycles with SCLK at 3.4 MHz
Throughput Rate 275 kSPS max See the Serial Interface section
