MAX7057
Due to the nature of the transmit PLL frequency divider,
a fixed offset of 16 must be subtracted from the trans-
mit PLL divider ratio for programming the MAX7057’s
transmit frequency registers. To determine the value to
program the MAX7057’s transmit frequency registers,
convert the decimal value of the following equation to
the nearest hexadecimal value:
Assume that the ASK transmit frequency = 315MHz
and f
XTAL
= 16MHz. In this example, the rounded deci-
mal value is 15,104, or 0x3B00 hexadecimal. The upper
2 bytes (0x3B) are loaded into the LOFREQ1 register,
and the low 2 bytes (0x00) are loaded into the
LOFREQ0 register. In ASK mode, the transmit frequen-
cy equals the lower frequency programmed into the
MAX7057’s transmit frequency registers (see Tables 2,
3, and 9–12).
In FSK mode, the transmit frequencies equal the upper
(HIFREQ1 and HIFREQ0) and lower (LOFREQ1 and
LOFREQ0) frequencies programmed into the MAX7057’s
transmit frequency registers. Calculate the upper and
lower frequency in the same way as shown above. FSK
deviations as low as ±2kHz and as high as ±100kHz are
programmable (see Tables 2, 3, and 8–12).
The exact min and max values for the transmit frequen-
cy registers (HIFREQ1/0, LOFREQ1/0) are 2.9596
(0x2F42) and 12.0220 (0xC05A), yielding a synthesizer
ratio of 18.9596 and 28.0220, respectively. These limits
MUST be followed to prevent the delta-sigma modula-
tor from overflowing.
Whenever all of the fractional bits in the HIFREQ1/0 and
LOFREQ1/0 registers are zero (fhi[11:0] and flo[11:0]),
only an integer divider is used, and the delta-sigma
modulator is not in operation. This allows lower current
operation. The 600kHz PLL bandwidth should be used
in this mode to reduce phase noise.
Any change to the transmit frequency registers must be
followed by writing a “1” to the self-reset frequency load
register (see Tables 2, 3, and 12).
Crystal (XTAL) Oscillator
The crystal (XTAL) oscillator in the MAX7057 is
designed to present a capacitance of approximately
6pF between XTAL1 and XTAL2. In most cases, this
corresponds to an 8pF load capacitance applied to the
external crystal when typical PCB parasitics are added.
The MAX7057 is designed to operate with a typical
10pF load capacitance crystal. It is very important to
use a crystal with a load capacitance that is equal to
the capacitance of the MAX7057 crystal oscillator
plus PCB parasitics and optional external load
capacitors. If a crystal designed to oscillate with a dif-
ferent load capacitance is used, the crystal is pulled
away from its stated operating frequency, introducing
an error in the reference frequency. A crystal designed
to operate at a higher load capacitance than the value
specified for the oscillator is always pulled higher in fre-
quency. Adding capacitance to increase the load
capacitance on the crystal increases the start-up time
and can prevent oscillation altogether.
In actuality, the oscillator pulls every crystal. The crys-
tal’s natural frequency is below its specified frequency,
but when loaded with the specified load capacitance,
the crystal is pulled and oscillates at its specified fre-
quency. This pulling is already accounted for in the
specification of the load capacitance.
Additional pulling can be calculated if the electrical
parameters of the crystal are known. The frequency
pulling is given by:
where:
fp is the amount the crystal frequency is pulled in ppm
C
m
is the motional capacitance of the crystal
C
case
is the case capacitance
C
spec
is the specified load capacitance
C
load
is the actual load capacitance
When the crystal is loaded as specified (i.e., C
load
=
C
spec
), the frequency pulling equals zero.
Communication Protocol
The MAX7057 registers are programmed through an SPI
interface. Figure 2 shows the timing diagram of the SPI.
The GPO must be properly configured to act as an SPI
data output (SDO) by setting the configuration 1 register
(see Tables 2, 3, 15, and 16).
The SPI operates on a byte format, according to Figure 2.
