LT1952/LT1952-1
13
19521fe
Shutdown and Programming Undervoltage Lockout
The LT1952/LT1952-1 have an accurate 1.32V shutdown
threshold at the SD_V
SEC
pin. This threshold can be
used in conjunction with a resistor divider to define the
undervoltage lockout threshold (UVLO) of the system
input voltage (V
S
) to the power converter (Figure 3). A pin
current hysteresis (10µA before part turn on, 0µA after
part turn on) allows UVLO hysteresis to be programmed.
Calculation of the ON/OFF thresholds for the supply (SV
IN
)
to the power converter can be made as follows:
V
S OFF
Threshold = 1.32[1 + (R1/R2)]
V
S ON
Threshold = SV
IN
OFF+(10µA•R1)
A simple open drain transistor can be added to the resistor
divider network at the SD_V
SEC
pin to control the turn off
of the LT1952/LT1952-1 (Figure 3).
The SD_V
SEC
pin must not be left open since there must
be an external source current >10µA to lift the pin past its
1.32V threshold for part turn on.
APPLICATIONS INFORMATION
Micropower Start-Up: Selection of Start-Up Resistor
and Capacitor for V
IN
The LT1952/LT1952-1 use turn-on voltage hysteresis at
the V
IN
pin and low start-up current to allow micro-power
start-up (Figure 4). The LT1952/LT1952-1 monitor V
IN
pin
voltage to allow part turn on at 14.25V (7.75V LT1952-1)
and part turn off at 8.75V (6.5V LT1952-1). Low start-up
OPERATION
Slope Compensation
The current mode architecture requires slope compensa-
tion to be added to the current sensing loop to prevent
subharmonic oscillations which can occur for duty cycles
above 50%. Unlike most current mode converters which
have a slope compensation ramp that is fixed internally,
placing a constraint on inductor value and operating
frequency, the LT1952/LT1952-1 have externally adjust-
able slope compensation. Slope compensation can be
programmed by inserting an external resistor (R
SLOPE
)
in series with the I
SENSE
pin. The LT1952/LT1952-1 have
a linear slope compensation ramp which sources current
out of the I
SENSE
pin of approximately 8µA at 0% duty
cycle to 35µA at 80% duty cycle.
Overcurrent Detection and Soft-Start (OC Pin)
An added feature to the LT1952/LT1952-1 is a precise
100mV sense threshold at the OC pin used to detect
overcurrent conditions in the converter and set a soft-start
latch. The OC pin is connected directly to the source of
the primary side MOSFET to monitor peak current in the
MOSFET (Figure 7). The 107mV threshold is constant
over the entire duty cycle range of the converter because
it is unaffected by the slope compensation added to the
I
SENSE
pin.
Synchronizing
A SYNC pin allows the LT1952/LT1952-1 oscillator to be
synchronized to an external clock. The SYNC pin can be
driven from a logic level output, requiring less than 0.8V
for a logic level low and greater than 2.2V for a logic level
high. Duty cycle should run between 10% and 90%. To
avoid loss of slope compensation during synchroniza-
tion, the free running oscillator frequency (f
OSC
) should
be programmed to 80% of the external clock frequency
(f
SYNC
). The R
SLOPE
resistor chosen for non-synchronized
operation should be increased by 1.25x (= f
SYNC
/f
OSC
).
Figure 3. Programming Undervoltage Lockout (UVLO)
1.32V
SYSTEM
INPUT (V
S
)
OPTIONAL
SHUTDOWN
TRANSISTOR
1952 F03
SD_V
SEC
11µA
LT1952/LT1952-1
R1
R2
+
OFFON
LT1952/LT1952-1
14
19521fe
current (460µA LT1952; 400µA LT1952-1) allows a large
resistor to be connected between system input supply and
V
IN
. Once the part is turned on, input current increases to
drive the IC (4.5mA) and the output drivers (I
DRIVE
). A large
enough capacitor is chosen at the V
IN
pin to prevent V
IN
falling below its turn off threshold before an auxiliary winding
in the converter takes over supply to V
IN
. This technique
allows a simple resistor/capacitor for start-up which draws
low power from the system supply to the converter. The
values for R
START
and C
START
are given by:
R
START(MAX)
= (V
S(MIN)
– V
IN ON(max)
)/I
START(MAX)
C
START(MIN)
= (I
Q(MAX)
+ I
DRIVE(MAX)
)•t
START
/
V
IN HYST(MIN)
Example: (LT1952)
For V
S(MIN)
= 36V, V
IN ON(MAX)
= 15.75V,
I
START(MAX)
= 700µA, I
Q(MAX)
= 5.5mA,
I
DRIVE(MAX)
= 5mA, V
IN HYST(MIN)
= 3.75V
and t
START
= 100µs,
R
START
= (36 – 15.75)/700µA = 28.9k (choose 28.7k)
C
START
=(5.5mA+5mA)•100µs/3.75V=0.28µF
(typically choose ≥ 1µF)
For system input voltages exceeding the absolute maximum
rating of the LT1952/LT1952-1 V
IN
pin, an external zener
should be connected from the V
IN
pin to ground. This
covers the condition where V
IN
charges past V
IN ON
but
the part does not turn on because SD_V
SEC
< 1.32V. In this
condition V
IN
will continue to charge towards system V
IN
,
APPLICATIONS INFORMATION
possibly exceeding the rating for the V
IN
pin. The zener
voltage should obey V
IN ON(MAX)
< V
Z
< 25V.
Programming Oscillator Frequency
The oscillator frequency (f
OSC
) of the LT1952/LT1952-1 is
programmed using an external resistor (R
OSC
) connected
between the R
OSC
pin and ground. Figure 5 shows typical
f
OSC
vs R
OSC
resistor values. The LT1952/LT1952-1 free-
running oscillator frequency is programmable in the range
of 100kHz to 500kHz.
Stray capacitance and potential noise pickup on the R
OSC
pin should be minimized by placing the R
OSC
resistor as
close as possible to the R
OSC
pin and keeping the area of
the R
OSC
node as small as possible. The ground side of
the R
OSC
resistor should be returned directly to the (analog
ground) GND pin. R
OSC
can be calculated by:
R
OSC
= 9.125k [(4100k/f
OSC
) – 1]
Figure 4. Low Power Start-Up
1.32V
SYSTEM
INPUT (V
S
)
FROM AUXILIARY WINDING
*FOR V
S
> 25V, ZENER D1 RECOMMENDED
(V
IN ON(MAX)
< V
Z
< 25V)
1952 F04
V
IN
(14.25V ON, 8.75V OFF) LT1952
(7.75V ON, 6.5V OFF) LT1952-1
C
START
D1*
R
START
+
Figure 5. Oscillator Frequency (f
OSC
) vs R
OSC
R
OSC
(kΩ)
50
FREQUENCY (kHz)
400
1952 F05
100 150 250200 300 350
500
450
400
350
300
250
200
150
100
Programming Leading Edge Blank Time
For PWM controllers driving external MOSFETs, noise
can be generated at the source of the MOSFET during
gate rise time and some time thereafter. This noise can
potentially exceed the OC and I
SENSE
pin thresholds of the
LT1952/LT1952-1 to cause premature turn off of SOUT and
OUT in addition to false trigger of soft-start. The LT1952/
LT1952-1 provide programmable leading edge blanking
of the OC and I
SENSE
comparator outputs to avoid false
current sensing during MOSFET switching.
LT1952/LT1952-1
15
19521fe
Blanking is provided in 2 phases (Figure 6): The first phase
automatically blanks during gate rise time. Gate rise times
can vary depending on MOSFET type. For this reason the
LT1952/LT1952-1 perform true ‘leading edge blanking’ by
automatically blanking OC and I
SENSE
comparator outputs
until OUT rises to within 0.5V of V
IN
or reaches its clamp
level of 13V. The second phase of blanking starts after
the leading edge of OUT has been completed. This phase
is programmable by the user with a resistor connected
from the BLANK pin to ground. Typical durations for this
portion of the blanking period are from 45ns at R
BLANK
= 10k to 540ns at R
BLANK
= 120k. Blanking duration can
be approximated as:
Blanking (extended) = [45(R
BLANK
/10k)]ns
(see graph in Typical Performance Characteristics)
APPLICATIONS INFORMATION
the MOSFET. The current limit for the converter can be
programmed by:
Current limit = (107mV/R
S
)(N
P
/N
S
) – (1/2)(I
RIPPLE
)
where:
R
S
= sense resistor in source of primary MOSFET
I
RIPPLE
= p-p ripple current in the output inductor L1
N
S
= number of transformer secondary turns
N
P
= number of transformer primary turns
Programming Slope Compensation
The LT1952/LT1952-1 use a current mode architecture
to provide fast response to load transients and to ease
frequency compensation requirements. Current mode
switching regulators which operate with duty cycles above
50% and have continuous inductor current must add slope
compensation to their current sensing loop to prevent
subharmonic oscillations. (For more information on slope
compensation, see Application Note 19.) The LT1952/
LT1952-1 have programmable slope compensation to allow
a wide range of inductor values, to reduce susceptibility
to PCB generated noise and to optimize loop bandwidth.
The LT1952/LT1952-1 program slope compensation by
inserting a resistor R
SLOPE
in series with the I
SENSE
pin
(Figure 7). The LT1952/LT1952-1 generate a current at
the I
SENSE
pin which is linear from 0% duty cycle to the
maximum duty cycle of the OUT pin. A simple calculation
of I(I
SENSE
)•R
SLOPE
gives an added ramp to the voltage
at the I
SENSE
pin for programmable slope compensation.
(See both graphs ‘I
SENSE
Pin Current vs. Duty Cycle’ and
‘I
SENSE
Maximum Threshold vs Duty Cycle’ in the Typical
Performance Characteristics section.)
Figure 6. Leading Edge Blank Timing
R
BLANK
(MIN)
= 10k
10k < R
BLANK
240k 100ns
(AUTOMATIC)
LEADING
EDGE
BLANKING
(PROGRAMMABLE)
EXTENDED
BLANKING
CURRENT
SENSE
DELAY
OUT
BLANKING
1952 F06
0 Xns
X + 45ns [X + 45(R
BLANK
/10k)]ns
Programming Current Limit (OC Pin)
The LT1952/LT1952-1 use a precise 107mV sense threshold
at the OC pin to detect overcurrent conditions in the
converter and set a soft-start latch. It is independent of
duty cycle because it is not affected by slope compensation
programmed at the I
SENSE
pin. The OC pin monitors the
peak current in the primary MOSFET by sensing the
voltage across a sense resistor (R
S
) in the source of
Figure 7. Programming Slope Compensation
CURRENT SLOPE = 35µA • DC
V
(ISENSE)
= V
S
+ (I
SENSE
• R
SLOPE
)
I
SENSE
= 8µA + 35DC µA
DC = DUTY CYCLE
FOR SYNC OPERATION
I
SENSE(SYNC)
= 8µA + (k • 35DC)µA
k = f
OSC
/f
SYNC
1952 F07
I
SENSE
OUT
LT1952/
LT1952-1
OC
R
S
R
SLOPE
V
S

LT1952EGN-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 1x Switch Sync For Cntr
Lifecycle:
New from this manufacturer.
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