LT1952/LT1952-1
24
19521fe
Bus Converter: Optimum Output Voltage Tolerance
The Bus Converter applications shown on page 1 and in
Figure 16, provide semi-regulated isolated outputs without
the need for an optocoupler, optocoupler driver, reference or
feedback network. The LT1952/LT1952-1Volt-Second clamp
adjusts switch duty cycle inversely proportional to input
voltage to provide an output voltage that is regulated against
input line variations. Some bus converters use a switch duty
cycle limit which causes output voltage variation of typically
±33% over a 2:1 input voltage range. The LT1952/LT1952-1
typically provide a ±10% output variation for the same input
variation. Typical output tolerance is further improved for the
LT1952 by inserting a resistor from the system input voltage
to the SS_MAXDC pin (Rx in Figure 19).
The LT1952/LT1952-1 electrical specifications for the OUT
Max Duty Cycle Clamp show typical switch duty cycle to
move from 72% to 33% for a 2x change of input voltage
(SS_MAXDC pin = 1.84V). Since output voltage regulation
follows V
IN
•DutyCycle,aswitchdutycyclechangeof
72% to 36% (for a 2x input voltage change) provides
minimal output voltage variation for the LT1952/LT1952-1
bus converter. To achieve this, an SS_MAXDC pin voltage
increase of 1.09x (36/33) would be required at high input
line. A resistor Rx inserted between the SS_MAXDC pin
and system input voltage (Figure 19) increases SS_MAXDC
voltage as input voltage increases, minimizing output
voltage variation over a 2:1 input voltage change.
The following steps determine values for Rx, R
T
and R
B
:
(1)Program switch duty cycle at minimum system input
voltage (V
S(MIN)
)
(a)R
T(1)
= 10k (minimum allowed to still guarantee soft-
start pull-down)
APPLICATIONS INFORMATION
(b)Select switch duty cycle for the Bus Converter for a
given output voltage at V
S(MIN)
and calculate SS_MAXDC
voltage (SS1) (See Applications Information “Program-
ming Maximum Duty Cycle Clamp”)
(c)Calculate R
B(1)
=[SS1/(2.5–SS1)]•R
T(1)
(2)Calculate Rx:
Rx = ([V
S(MAX)
– V
S(MIN)
]/[SS1•(X–1)])•R
THEV(1)
R
THEV(1)
= R
B(1)
•R
T(1)
/(R
B(1)
+ R
T(1)
), X = ideal duty
cycle (V
S(MAX)
)/actual duty cycle (V
S(MAX)
)
(3)The addition of Rx causes an increase in the original
programmed SS_MAXDC voltage SS1. A new value for
R
B(1)
should be calculated to provide a lower SS_MAXDC
voltage (SS2) to correct for this offset:
(a)SS2 = SS1 – [(V
S(MIN)
–SS1)•R
THEV(1)
/Rx]
(b)R
B(2)
=[SS2/(2.5–SS2)]•R
T(1)
(4)The thevinin resistance R
THEV(1)
used to calculate Rx
should be re-established for R
T
and R
B
:
(a) R
B
(final value) = R
B(2)
•(R
THEV(1)
/R
THEV(2)
)
(b) R
T
(final value) = R
T(1)
•(R
THEV(1)
/R
THEV(2)
)
where R
THEV(2)
= R
B(2)
•R
T(1)
/(R
B(2)
+ R
T(1)
)
Example:
For a Bus Converter running from 36V to 72V input,
V
S(MIN)
= 36V, V
S(MAX)
= 72V.
choose R
T(1)
= 10k, SS_MAXDC = SS1 = 1.84V (for 72%
duty cycle at V
S(MIN
) = 36V)
R
B(1)
=[1.84V/(2.5V–1.84V)]•10k=28k
R
THEV(1)
=[28k•10k/(28k+10k)]=7.4k
SS_MAXDC correction = 36%/33% = 1.09
Rx=[(72V–36V)/(1.84•0.09)]•7.4k=1.6M
SS2=1.84–[(36V–1.84)•7.4k/1.6M]=1.682V
R
B(2)
=[1.682/(2.5–1.682)]•10k=20.6k
R
THEV(2)
=[20.6k•10k/(20.6k+10k)]=6.7k
R
THEV(1)
/R
THEV(2)
= 7.4k/6.7k = 1.104
R
B
(nalvalue)=20.6k•1.104=22.7k(choose22.6k)
R
T
(nalvalue)=10k•1.104=11k
SYSTEM
INPUT VOLTAGE
VOLT-SECOND
CLAMP INPUT
VOLT-SECOND
CLAMP ADJUST INPUT
1952 F19
SD_V
SEC
SS_MAXDC
V
REF
LT1952/
LT1952-1
R1 Rx
R2
R
B
R
T
Figure 19. Optimal Programming of Maximum Duty
Cycle Clamp for Bus Converter Applications (Adding Rx)
