LT1952/LT1952-1
16
19521fe
Programming Synchronous Rectifier Timing:
SOUT to OUT delay (‘t
DELAY
’)
The LT1952/LT1952-1 have an additional output SOUT
which provides a ±50mA peak drive clamped to 12V. In
applications requiring synchronous rectification for high
efficiency, the LT1952/LT1952-1 SOUT provides a sync
signal for secondary side control of the synchronous
rectifier MOSFETs (Figure 11). Timing delays through the
converter can cause non-optimum control timing for the
synchronous rectifier MOSFETs. The LT1952/LT1952-1
provide a programmable delay (t
DELAY
, Figure 8) between
SOUT rising edge and OUT rising edge to optimize timing
control for the synchronous rectifier MOSFETs to achieve
maximum efficiency gains. A resistor R
DELAY
connected
from the DELAY pin to ground sets the value of t
DELAY
.
Typical values for t
DELAY
range from 10ns with R
DELAY
=
10k to 160ns with R
DELAY
= 160k. (see graph in Typical
Performance Characteristics)
APPLICATIONS INFORMATION
SS_MAXDC pin using a resistor divider from V
REF
. An
increase of voltage at the SS_MAXDC pin causes the
maximum duty cycle clamp to increase.
To program the volt-second clamp, the following steps
should be taken:
(1)The maximum operational duty cycle of the converter
should be calculated for the given application.
(2)An initial value for the maximum duty cycle clamp
should be calculated using the equation below with a
first pass guess for SS_MAXDC.
Note: Since maximum operational duty cycle occurs at
minimum system input voltage (UVLO), the voltage at the
SD_V
SEC
pin = 1.32V.
Max Duty Cycle Clamp (OUT pin)
=k•0.522(SS_MAXDC(DC)/SD_V
SEC
) –
(t
DELAY
•f
OSC
)
where,
SS_MAXDC(DC) = V
REF
(R
B
/(R
T
+ R
B
)
SD_V
SEC
= 1.32V at minimum system input voltage
t
DELAY
= programmed delay between SOUT and OUT
k = 1.11 – 5.5e
–7
•(f
OSC
)
(3) The maximum duty cycle clamp calculated in (2) should
be programmed to be 10% greater than the maximum
operational duty cycle calculated in (1). Simple adjust-
ment of maximum duty cycle can be achieved by adjusting
SS_MAXDC.
Figure 8. Programming SOUT to OUT Delay: t
DELAY
1952 F08
DELAY
LT1952/
LT1952-1
R
DELAY
t
DELAY
SOUT
OUT
Programming Maximum Duty Cycle Clamp
For forward converter applications using the simplest
topology of a single MOSFET on the primary, a maximum
switch duty cycle clamp which adapts to transformer
input voltage is necessary for reliable control of the
MOSFET. This volt-second clamp provides a safeguard for
transformer reset that prevents transformer saturation. The
LT1952/LT1952-1 SD_V
SEC
and SS_MAXDC pins provide a
capacitor-less, programmable volt-second clamp solution
using simple resistor ratios (Figure 9).
An increase of voltage at the SD_V
SEC
pin causes the
maximum duty cycle clamp to decrease. Deriving SD_V
SEC
from a resistor divider connected to system input voltage
creates the volt-second clamp. The maximum duty cycle
clamp can be adjusted by programming voltage on the
Figure 9. Programming Maximum Duty Cycle Clamp
SYSTEM
INPUT VOLTAGE
ADAPTIVE
DUTY CYCLE
CLAMP INPUT
MAX DUTY CYCLE
CLAMP ADJUST INPUT
*MINIMUM ALLOWABLE R
T
IS 10k TO
GUARANTEE SOFT-START PULL-OFF
1952 F09
SD_V
SEC
SS_MAXDC
V
REF
LT1952/
LT1952-1
R1
R2
R
B
R
T
*
