LT1952/LT1952-1
19
19521fe
V
SS
(t) = SS_MAXDC(DC) (1 – e
(–t/RC)
)
to give:
t=RC•(–1)•ln(1–V
SS
/SS_MAXDC(DC))
where:
V
SS
= SS_MAXDC voltage at time t
SS_MAXDC(DC) = programmed DC voltage setting
maximum duty cycle clamp =
V
REF
(R
B
/(R
T
+ R
B
)
R = R
CHARGE
(Figure 11) = R
T
•R
B
/(R
T
+ R
B
)
C = C
SS
(Figure 11)
Example (1) No Switching Period
The period of no switching for the converter, when a soft-start
event has occurred, depends on how far SS_MAXDC can
fall before recharging occurs and how long a fault exists. It
will be assumed that a fault triggering soft-start is removed
before SS_MAXDC can reach its reset threshold (0.45V).
No Switching Period = t
DISCHARGE
+ t
CHARGE
t
DISCHARGE
= discharge time from SS_MAXDC(DC) to
0.45V
t
CHARGE
= charge time from 0.45V to V
SS(ACTIVE)
t
DISCHARGE
was already calculated earlier as 185µs.
t
CHARGE
is calculated by assuming the following:
V
REF
= 2.5V, R
T
= 35.7k, R
B
= 100k, C
SS
= 0.1µF and
V
SS(MIN)
= 0.45V.
t
CHARGE
= t(V
SS
= 0.8V) – t(V
SS
= 0.45V)
Step 1:
SS_MAXDC(DC) = 2.5[100k/(35.7k + 100k)] = 1.84V
R
CHARGE
=(35.7k•100k/135.7k)=26.3k
Step 2:
t(V
SS
= 0.45V) is calculated from,
t = R
CHARGE
•C
SS
•(–1)•ln(1–V
SS
/SS_MAXDC(DC))
= 2.63e
4
•1e
–7
•(–1)•ln(1–0.45/1.84)
= 2.63e
–3
•(–1)•ln(0.755)=7.3e
–4
s
APPLICATIONS INFORMATION
Step 3:
t(V
SS
= 0.8V) is calculated from:
t = R
CHARGE
•CSS•(–1)•ln(1–V
SS
/SS_MAXDC(DC))
=2.63e4•1e
–7
•(–1)•ln(1–0.8/1.84)
=2.63e–3•(–1)•ln(0.565)=1.5e
–3
s
From Step 1 and Step 2:
t
CHARGE
= (1.5 – 0.73)e
–3
s = 7.7e
–4
s
The total time of no switching for the converter due to a
soft-start event:
= t
DISCHARGE
+ t
CHARGE
= 1.85e
–4
+ 7.7e
–4
= 9.55e
–4
s
Example (2) Converter Output Rise Time
The rise time for the converter output to reach regulation
can be closely approximated as the time between the start
of switching (SS_MAXDC = V
SS(ACTIVE)
) and the time where
converter duty cycle is in regulation (DC(REG)) and no
longer controlled by SS_MAXDC (SS_MAXDC = V
SS(REG)
).
Converter output rise time can be expressed as:
Output Rise Time = t(V
SS(REG)
) – t(V
SS(ACTIVE)
)
Step 1: Determine converter duty cycle DC(REG) for
output in regulation.
The natural duty cycle DC(REG) of the converter depends on
several factors. For this example it is assumed that DC(REG)
= 60% for system input voltage near the undervoltage
lockout threshold (UVLO). This gives SD_V
SEC
= 1.32V.
Also assume that the maximum duty cycle clamp
programmed for this condition is 72% for SS_MAXDC(DC)
= 1.84V, f
OSC
= 200kHz and R
DELAY
= 40k.
Step 2: Calculate V
SS(REG)
To calculate the level of SS_MAXDC (V
SS(REG)
) that no longer
clamps the natural duty cycle of the converter, the equation
for maximum duty cycle clamp must be used (see previous
section ‘Programming Maximum Duty Cycle Clamp’).
The point where the maximum duty cycle clamp meets
DC(REG) during soft-start is given by:
DC(REG) = Max Duty Cycle clamp
0.6=k•0.522(SS_MAXDC(DC)/SD_V
SEC
) –
(t
DELAY
•f
OSC
)
LT1952/LT1952-1
20
19521fe
For SD_V
SEC
= 1.32V, fOSC = 200kHz and R
DELAY
= 40k
This gives k = 1 and t
DELAY
= 40ns.
Re-arranging the above equation to solve for SS_MAXDC
= V
SS(REG)
= [0.6 + (t
DELAY
•f
OSC
)(SD_V
SEC
)]/(k•0.522)
=[0.6+(40ns•200kHz)(1.32V)]/(1•0.522)
= (0.608)(1.32)/0.522 = 1.537V
Step 3: Calculate t(V
SS(REG)
) – t(V
SS(ACTIVE)
)
Recall the time for SS_MAXDC to charge to a given voltage
V
SS
is given by:
t = R
CHARGE
•C
SS
•(–1)•ln(1–V
SS
/SS_MAXDC(DC))
(Figure 11 gives the model for SS_MAXDC charging)
For R
T
= 35.7k, R
B
= 100k, R
CHARGE
= 26.3k
For C
SS
= 0.1µF, this gives t(V
SS(ACTIVE)
)
= t(V
SS(0.8V)
) = 2.63e
4
•1e
–7
•(–1)•ln(1–0.8/1.84)
= 2.63e
–3
•(–1)•ln(0.565)=1.5e
–3
s
t(V
SS(REG)
) = t(V
SS(1.537V)
)=26.3k•0.1µF•–1•
ln(1 – 1.66/1.84) = 2.63e
–3
•(–1)•ln(0.146)
= 5e
–3
s
The rise time for the converter output
= t(V
SS(REG)
) – t(V
SS(ACTIVE)
) = (5 – 1.5)e
–3
s
= 3.5e
–3
s
Example (3) Time For Maximum Duty Cycle Clamp to
Reach Within X% of Target Value
A maximum duty cycle clamp of 72% was calculated
previously in the section ‘Programming Maximum
Duty Cycle Clamp’. The programmed value used for
SS_MAXDC(DC) was 1.84V.
The time for SS_MAXDC to charge from its minimum value
V
SS(MIN)
to within X% of SS_MAXDC(DC) is given by:
t(SS_MAXDC charge time within X% of target)
=t[(1–(X/100)•SS_MAXDC(DC)]–t(V
SS(MIN)
)
For X = 2 and V
SS(MIN)
=0.45V,t(0.98•1.84)–
t(0.45) = t(1.803) – t(0.45)
From previous calculations, t(0.45) = 7.3e – 4 s.
Using previous values for R
T
, R
B
, and C
SS
,
APPLICATIONS INFORMATION
t(1.803) = 2.63e
–4
•1e
–7
•(–1)•ln(1–1.803/1.84)
= 2.63e
–3
•(–1)•ln(0.02)=1.03e
–2
s
Hence the time for SS_MAXDC to charge from its minimum
reset threshold of 0.45V to within 2% of its target value
is given by:
t(1.803) – t(0.45) =
1.03e
–2
– 7.3e
–4
= 9.57e
–3
Forward Converter Applications
The following section covers applications where the
LT1952/LT1952-1 are used in conjunction with other LTC
parts to provide highly efficient power converters using
the single switch forward converter topology.
95% Efficient, 5V, Synchronous Forward Converter
The circuit in Figure 14 is based on the LT1952-1 to provide
the simplest forward power converter circuit—using only
one primary MOSFET. The SOUT pin of the LT1952-1
provides a synchronous control signal for the LTC1698
located on the secondary. The LTC1698 drives secondary
side synchronous rectifier MOSFETs to achieve high
efficiency. The LTC1698 also serves as an error amplifier
and optocoupler driver.
Efficiency and transient response are shown in Figures 12
and 13. Peak efficiencies of 95% and ultra-fast transient
response are superior to presently available power
modules. Integrated soft-start, overcurrent detection and
short-circuit hiccup mode provide low stress, reliable
protection. In addition, the circuit in Figure 14 is an all-
ceramic capacitor solution providing low output ripple
voltage and improved reliability. The LT1952-based
converter can be used to replace power module converters
at a much lower cost. The LT1952 solution benefits from
thermal conduction of the system board resulting in higher
efficiencies and lower rise in component temperatures. The
7mm height allows dense packaging and the circuit can
easily be adjusted to provide an output voltage from 1.23V
to 26V. Higher currents are achievable by simple scaling
of power components. The LT1952-1-based solution in
Figure 14 is a powerful topology for replacement of a wide
range of power modules.
LT1952/LT1952-1
21
19521fe
APPLICATIONS INFORMATION
LOAD CURRENT (A)
0
EFFICIENCY (%)
2520
1952 F12
5
10
15
98
96
94
92
90
88
86
V
IN
= 48V
V
OUT
= 5V
f
OSC
= 300kHz
Figure 12. LT1952-Based Synchronous Forward Converter
Efficiency vs Load Current (For Circuit in Figure 14)
Figure 14. 36V to 72V Input to 5V at 20A Synchronous Forward Converter
V
DD
CG
PGND
GND
OPTO
V
COMP
V
FB
FG
SYNC
V
AUX
I
COMP
+I
SNS
–I
SNS
OVP
LTC1698
1
2
3
4
5
6
8
16
15
14
13
12
11
9
HCPL-M453
0.1µF
10V
BIAS
6
5
4
1
2
3
SYNC
7V
BIAS
+V
0UT
R14
1.2k
R16
12.4k
R15
38.3k
C9, 6.8nF
1µF
X5R
R13
270Ω
0.1µF
T1
PA0491
Q2
PH3830
Q3
PH3830
L1
PA1393.152
C
01
100µF
X5R
2×
+V
0UT
5V
20A
SYNC
220pF
560Ω
T2
SOUT
SOUT
C
IN
2.2µF
100V
X5R
+V
IN
36V TO 72V
1952 F14
Q1: PHM15NQ20 PHILIPS
SD_V
SEC
OUT
OC
I
SENSE
PGND
GND
V
IN
LT1952-1
BLANK DELAY
9 12
16
5
6
2
3
4
7
14
11
10
13
8
15
115k
1k
0.1µF
0.1µF
10V
BIAS
475k
18.2k
22k
40k 33k 4.75k
9.53k
100k
Q1
0.015Ω
COMP
1
1µF
SYNC
SOUT
SS_MAXDC
V
REF
FB
R
OSC
V
OUT
(200mV/DIV)
0A
I
OUT
(5A/DIV)
20µs/DIV
1952 F13
Figure 13. Output Voltage Transient Response
(6A to 12A Load Step at 6A/µs)

LT1952EGN-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 1x Switch Sync For Cntr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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