AD7829-1
Rev. 0 | Page 18 of 20
MICROPROCESSOR INTERFACING
PSP0 TO PSP7
RD
INT
PIC16C6x/7x
1
DB0 TO DB7
RD
EOC
CS
1
ADDITIONAL PINS OMITTED FOR CLARITY.
CS
AD7829-1
1
06179-026
The parallel port on the AD7829-1 allows the ADCs to be
interfaced to a range of many different microcontrollers. This
section explains how to interface the AD7829-1 with some of
the more common microcontroller parallel interface protocols.
AD7829-1 TO 8051
Figure 24 shows a parallel interface between the AD7829-1 and
the 8051 microcontroller. The
EOC
signal on the AD7829-1
provides an interrupt request to the 8051 when a conversion
ends and data is ready. Port 0 of the 8051 can serve as an input
or output port, or, as in this case when used together with the
address latch enable (ALE) of the AD8051, it can be used as a
bidirectional low order address and data bus. The ALE output
of the 8051 is used to latch the low byte of the address during
accesses to the device, while the high order address byte is
supplied from Port 2. Port 2 latches remain stable when the
AD7829-1 is addressed, because they do not have to be turned
around (set to 1) for data input, as is the case for Port 0.
Figure 25. Interfacing to the PIC16C6x/PIC16C7x
AD7829-1 TO ADSP-21xx
Figure 26 shows a parallel interface between the AD7829-1 and
the ADSP-21xx series of DSPs. As before, the
EOC
signal on the
AD7829-1 provides an interrupt request to the DSP when a
conversion ends.
AD0 TO AD7
ALE
A8 TO A15
RD
INT
8051
1
LATCH
DECODER
DB0 TO DB7
RD
EOC
CS
1
ADDITIONAL PINS OMITTED FOR CLARITY.
AD7829-1
1
06179-025
D7 TO D0
RD
IRQ
ADSP-21xx
1
DB0 TO DB7
RD
EOC
CS
1
ADDITIONAL PINS OMITTED FOR CLARITY.
DMS
EN
ADDRESS
DECODE
LOGIC
A13 TO A0
06179-027
AD7829-1
1
Figure 24. Interfacing to the 8051
Figure 26. Interfacing to the ADSP-21xx
AD7829-1 TO PIC16C6x/PIC16C7x
INTERFACING MULTIPLEXER ADDRESS INPUTS
Figure 25 shows a parallel interface between the AD7829-1 and
the PIC16C64/PIC16C65/PIC16C74. The
Figure 27 shows a simplified interfacing scheme between the
AD7829-1 and any microprocessor or microcontroller that
facilitates easy channel selection on the ADCs. The multiplexer
address is latched on the falling edge of the
EOC
signal on the
AD7829-1 provides an interrupt request to the microcontroller
when a conversion begins. Of the PIC16C6x/PIC16C7x range of
microcontrollers, only the PIC16C64/PIC16C65/PIC16C74 can
provide the option of a parallel slave port. Port D of the micro-
controller operates as an 8-bit wide parallel slave port when Control
Bit PSPMODE in the TRISE register is set. Setting PSPMODE
enables Port Pin RE0 to be the
RD
signal, as outlined
in the
Parallel Interface section, which allows the use of the three
LSBs of the address bus to select the channel address. As shown in
Figure 27, only Address Bit A3 to Address Bit A15 are address
decoded, allowing A0 to A2 to be changed according to desired
channel selection without affecting chip selection.
RD CS
output and RE2 to be the
(chip select) output. For this functionality, the corresponding
data direction bits of the TRISE register must be configured as
outputs (reset to 0). See the PIC16C6x/PIC16C7x Microcontroller
User Manual for more information.
