AD7829-1
Rev. 0 | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter Rating
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
V
DD
to AGND −0.3 V to +7 V
V
DD
to DGND −0.3 V to +7 V
Analog Input Voltage to AGND
V
IN1
to V
IN8
−0.3 V to V
DD
+ 0.3 V
−0.3 V to V
DD
+ 0.3 V Reference Input Voltage to AGND
V
MID
Input Voltage to AGND −0.3 V to V
DD
+ 0.3 V
−0.3 V to V
DD
+ 0.3 V Digital Input Voltage to DGND
−0.3 V to V
DD
+ 0.3 V Digital Output Voltage to DGND
Operating Temperature Range
−40°C to +85°C Industrial (B Version)
−65°C to +150°C Storage Temperature Range
150°C Junction Temperature
SOIC Package, Power Dissipation 450 mW
θ
JA
Thermal Impedance 75°C/W
Lead Temperature, Soldering
215°C Vapor Phase (60 sec)
220°C Infrared (15 sec)
TSSOP Package, Power Dissipation 450 mW
θ
JA
Thermal Impedance 128°C/W
Lead Temperature, Soldering
215°C Vapor Phase (60 sec)
220°C Infrared (15 sec)
ESD 1 kV
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
AD7829-1
Rev. 0 | Page 7 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
06179-003
DB2 1
DB1
2
DB0 3
CONVST 4
DB328
DB4
27
DB526
DB625
CS
5
DB7
24
RD 6 AGND23
DGND 7 V
DD
22
EOC
8
V
REF IN/OUT
21
A2 9 V
MID
20
A1 10 V
IN1
19
A0
11
V
IN2
18
V
IN8
12
V
IN3
17
V
IN7
13
V
IN4
16
V
IN6
14
V
IN5
15
AD7829-1
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
12 to 19 V
IN8
to V
IN1
Analog Input Channels. The AD7829-1 has eight analog input channels. The inputs have an input span of 2.5 V
and 2 V, depending on the supply voltage (V
DD
). This span can be centered anywhere in the range AGND to V
DD
using the V
MID
pin. The default input range (V
MID
unconnected) is AGND to 2 V (V
DD
= 3 V ± 10%) or AGND to 2.5 V
(V
DD
= 5 V ± 10%). See the Analog Input section of the data sheet for more information.
22 V
DD
Positive Supply Voltage, 3 V ± 10% and 5 V ± 10%.
23 AGND Analog Ground. Ground reference for track/hold, comparators, reference circuit, and multiplexer.
7 DGND Digital Ground. Ground reference for digital circuitry.
4
CONVST Logic Input Signal. The convert start signal initiates an 8-bit analog-to-digital conversion on the falling edge
of this signal. The falling edge of this signal places the track/hold in hold mode. The track/hold goes into track
mode again 120 ns after the start of a conversion. The state of the
CONVST signal is checked at the end of a
conversion. If it is logic low, the AD7829-1 powers down (see the Operating Modes section).
8
EOC Logic Output. The end of conversion signal indicates when a conversion has finished. The signal can be used
to interrupt a microcontroller when a conversion has finished or latch data into a gate array (see the
Parallel
Interface
section).
5
CS Logic Input Signal. The chip select signal is used to enable the parallel port of the AD7829. This is necessary
if the ADC is sharing a common data bus with another device.
6
RD Logic Input Signal. The read signal is used to take the output buffers out of their high impedance state and drive
data onto the data bus. The signal is internally gated with the CS signal. Both
RD and CS must be logic low to
enable the data bus.
9 to 11 A2 to A0
Channel Address Inputs. The address of the next multiplexer channel must be present on these inputs when
the
RD signal goes low.
1 to 3,
24 to 28
DB2 to DB0,
DB7 to DB3
Data Output Lines. They are normally held in a high impedance state. Data is driven onto the data bus when
both
RD and CS go active low.
21 V
REF IN/OUT
Analog Input and Output. An external reference can be connected to the AD7829-1 at this pin. The on-chip
reference is also available at this pin. When using the internal reference, this pin can be left unconnected or,
in some cases, it can be decoupled to AGND with a 0.1 µF capacitor.
20 V
MID
The V
MID
pin, if connected, is used to center the analog input span anywhere in the range of AGND to V
DD
(see the
Analog Input section).
AD7829-1
Rev. 0 | Page 8 of 20
TERMINOLOGY
As a result, the second and third order terms are specified
separately. The calculation of the intermodulation distortion is
as per the THD specification, where it is the ratio of the rms
sum of the individual distortion products to the rms amplitude
of the fundamental expressed in decibels (dB).
Signal-to-(Noise + Distortion) Ratio
The measured ratio of signal-to-(noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (f
S
/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the
quantization noise. The theoretical signal-to-(noise +
distortion) ratio for an ideal N-bit converter with a sine wave
input is given by
Channel-to-Channel Isolation
A measure of the level of crosstalk between channels. It is
measured by applying a full-scale 20 kHz sine wave signal to
one input channel and determining how much that signal is
attenuated in each of the other channels. The figure given is
the worst case across all eight channels of the AD7829-1.
Signal-to-(Noise + Distortion) = (6.02N + 1.76) dB
Thus, for an 8-bit converter, this is 50 dB.
Relative Accuracy or Endpoint Nonlinearity
The maximum deviation from a straight line passing through
the endpoints of the ADC transfer function.
Total Harmonic Distortion (THD)
The ratio of the rms sum of harmonics to the fundamental.
For the AD7829-1 it is defined as
Differential Nonlinearity
The difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
1
6
54
32
V
VVVVV
THD
22222
log20)dB(
++++
=
Offset Error
where V
1
is the rms amplitude of the fundamental, and V
2
, V
3
,
V
4
, V
5
, and V
6
are the rms amplitudes of the second through the
sixth harmonics.
The deviation of the 128th code transition (01111111) to
(10000000) from the ideal, that is, V
MID
.
Offset Error Match
Peak Harmonic or Spurious Noise
The difference in offset error between any two channels.
The ratio of the rms value of the next largest component in the
ADC output spectrum (up to f
S
/2 and excluding dc) to the rms
value of the fundamental. Normally, the value of this specifica-
tion is determined by the largest harmonic in the spectrum,
but for parts where the harmonics are buried in the noise floor,
it will be a noise peak.
Zero-Scale Error
The deviation of the first code transition (00000000) to
(00000001) from the ideal; that is, V
MID
− 1.25 V + 1 LSB (V
DD
=
5 V ± 10%), or V
MID
− 1.0 V + 1 LSB (V
DD
= 3 V ± 10%).
Full-Scale Error
Intermodulation Distortion
The deviation of the last code transition (11111110) to
(11111111) from the ideal; that is, V
MID
+ 1.25 V − 1 LSB (V
DD
=
5 V ± 10%), or V
MID
+ 1.0 V − 1 LSB (V
DD
= 3 V ± 10%).
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities creates distortion
products at sum and difference frequencies of mfa ± nfb, where
m, n = 0, 1, 2, 3… . Intermodulation terms are those for which
neither m nor n is equal to zero. For example, the second order
terms include (fa + fb) and (fa − fb), while the third order terms
include (2fa + fb), (2fa − fb), (fa + 2fb), and (fa − 2fb). The
AD7829-1 is tested using the CCIF standard, where two input
frequencies near the top end of the input bandwidth are used.
In this case, the second and third order terms are of different
significance. The second order terms are usually distanced in
frequency from the original sine waves, while the third order
terms are usually at a frequency close to the input frequencies.
Gain Error
The deviation of the last code transition (1111 . . . 110) to
(1111 . . . 111) from the ideal; that is, V
REF
− 1 LSB, after the
offset error has been adjusted out.
Gain Error Match
The difference in gain error between any two channels.

AD7829BRWZ-1RL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 3V/5V 2MSPS 8-Bit 1-/4-/8-Ch Sampling
Lifecycle:
New from this manufacturer.
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