© 2016 Integrated Device Technology, Inc.
2.2. Analog Front End
2.2.1. Bandgap/PTAT and PTAT Amplifier
The highly linear Bandgap/PTAT provides the PTAT signal to the ADC, which allows accurate temperature con-
version. In addition, the ultra-low ppm-Bandgap provides a stable voltage reference over temperature for the
operation of the rest of the IC.
The PTAT signal is amplified through a path in the pre-amplifier (PREAMP) and fed to the ADC for conversion.
The most significant 12 bits of this converted result are used for temperature measurement and temperature
correction of bridge readings. When temperature is output in Digital Mode, only the most significant 8 bits are
given.
2.2.2. Bridge Supply
The voltage driven bridge is usually connected to V
DD
and ground. As a power savings feature, the ZSC31010
also includes a switched transistor to interrupt the bridge current via the Bsink pin. The transistor switching is
synchronized to the A/D-conversion and released after finishing the conversion. To utilize this feature, the low
supply of the bridge should be connected to Bsink instead of ground.
Depending on the programmable update rate, the average current consumption (including bridge current) can be
reduced to approximately 20%, 5% or 1%.
2.2.3. PREAMP Block
The differential signal from the bridge is amplified through a chopper-stabilized instrumentation amplifier with very
high input impedance, designed for low noise and low drift. This PREAMP provides gain for the differential signal
and re-centers its DC to V
DD
/2. The output of the PREAMP block is fed into the A/D-converter. The calibration
sequence performed by the digital core includes an auto-zero sequence to null any drift in the PREAMP state
over temperature.
The PREAMP is nominally set to a gain of 24. Other possible gain settings are 6, 12, and 48.
The inputs to the PREAMP from the VBN/VBP pins can be reversed via an EEPROM configuration bit.
2.2.4. Analog-to-Digital Converter (ADC)
A 14-bit/1 ms 2
nd
-order charge-balancing ADC is used to convert signals coming from the PREAMP. The con-
verter, designed in full differential switched-capacitor technique, is used for converting the various signals to the
digital domain. This principle offers the following advantages:
• High noise immunity because of the differential signal path and integrating behavior
• Independent from clock frequency drift and clock jitter
• Fast conversion time owing to second order mode
Four selectable values for the zero point of the input voltage allow the conversion to adapt to the sensor’s offset
parameter. The conversion rate varies with the programmed update rate. The fastest conversion rate is
1 k samples/s; the response time is then 1 ms. Based on a best fit, the Integral Nonlinearity (INL) is < 4 LSB
14Bit
.
