ZSC31010CEG1-T Datasheet ZSC31010CEG1-R, ZSC31010CIG1-R, ZSC31010CIG1-T | P4-P6

ZSC31010 Datasheet

January 20, 2016

3.3. Command/Data Bytes Encoding ................................................................................................................ 24

3.4. Calibration Sequence ................................................................................................................................. 25

3.5. EEPROM Bits ............................................................................................................................................. 27

3.6. Calibration Math ......................................................................................................................................... 29

3.6.1. Correction Coefficients ......................................................................................................................... 29

3.6.2. Interpretation of Binary Numbers for Correction Coefficients .............................................................. 30

3.7. Reading EEPROM Contents ...................................................................................................................... 34

4 Application Circuit Examples ............................................................................................................................. 35

4.1. Three-Wire Rail-to-Rail Ratiometric Output ................................................................................................ 35

4.2. Absolute Analog Voltage Output ................................................................................................................ 36

4.3. Three-Wire Ratiometric Output with Over-Voltage Protection ................................................................... 36

4.4. Digital Output .............................................................................................................................................. 37

4.5. Output Short Protection .............................................................................................................................. 37

5 Default EEPROM Settings ................................................................................................................................ 38

6 Pin Configuration and Package ......................................................................................................................... 39

7 ESD/Latch-Up-Protection .................................................................................................................................. 40

8 Test .................................................................................................................................................................... 40

9 Quality and Reliability ........................................................................................................................................ 40

10 Customization .................................................................................................................................................... 40

11 Ordering Codes ................................................................................................................................................. 41

12 Related Documents ........................................................................................................................................... 41

13 Definitions of Acronyms ..................................................................................................................................... 41

14 Document Revision History ............................................................................................................................... 42

List of Figures

Figure 2.1 ZSC31010 Block Diagram ................................................................................................................... 11

Figure 2.2 DAC Output Timing for Highest Update Rate ...................................................................................... 15

Figure 3.1 General Working Mode ........................................................................................................................ 18

Figure 3.2 Manchester Duty Cycle ........................................................................................................................ 20

Figure 3.3 19-Bit Write Frame ............................................................................................................................... 20

Figure 3.4 Read Acknowledge .............................................................................................................................. 21

Figure 3.5 Digital Output (NOM) Bridge Readings ............................................................................................... 21

Figure 3.6 Digital Output (NOM) Bridge Readings with Temperature .................................................................. 22

Figure 3.7 Read EEPROM Contents .................................................................................................................... 22

Figure 3.8 Transmission of a Number of Data Packets ........................................................................................ 22

Figure 3.9 ZACwire™ Output Timing for Lower Update Rates............................................................................. 23

Figure 4.1 Rail-to-Rail Ratiometric Voltage Output ............................................................................................... 35

ZSC31010 Datasheet

January 20, 2016

Figure 4.2 Absolute Analog Voltage Output.......................................................................................................... 36

Figure 4.3 Ratiometric Output, Temperature Compensation via Internal Diode ................................................... 36

Figure 6.1 ZSC31010 Pin-Out Diagram ................................................................................................................ 39

List of Tables

Table 1.1 ADC Resolution Characteristics for an Analog Gain of 6 ...................................................................... 9

Table 1.2 ADC Resolution Characteristics for an Analog Gain of 12 .................................................................... 9

Table 1.3 ADC Resolution Characteristics for an Analog Gain of 24 .................................................................. 10

Table 1.4 ADC Resolution Characteristics for an Analog Gain of 48 .................................................................. 10

Table 2.1 Order of Trim Codes ............................................................................................................................ 16

Table 2.2 Oscillator Trimming .............................................................................................................................. 17

Table 3.1 Pin Configuration and Latch-Up Conditions ........................................................................................ 19

Table 3.2 Total Transmission Time for Different Update Rate Settings and Output Configuration ..................... 23

Table 3.3 Special Measurement versus Update Rate ......................................................................................... 23

Table 3.4 Command/Data Bytes Encoding.......................................................................................................... 24

Table 3.5 Programming Details for Command 30

.............................................................................................. 25

Table 3.6 ZSC31010 EEPROM Bits .................................................................................................................... 27

Table 3.7 Correction Coefficients ........................................................................................................................ 29

Table 3.8 Gain_B[13:0] Weightings ..................................................................................................................... 30

Table 3.9 Offset_B Weightings ............................................................................................................................ 31

Table 3.10 Gain_T Weightings .............................................................................................................................. 31

Table 3.11 Offset_T Weightings ............................................................................................................................ 32

Table 3.12 EEPROM Read Order ......................................................................................................................... 34

Table 4.1 Resistor Values for Short Protection ................................................................................................... 37

Table 5.1 Factory Settings for the ZSC31010 EEPROM ..................................................................................... 38

Table 6.1 Storage and Soldering Conditions for the SOP-8 Package ................................................................. 39

Table 6.2 ZSC31010 Pin Configuration ............................................................................................................... 39

ZSC31010 Datasheet

January 20, 2016

1 Electrical Characteristics

1.1. Absolute Maximum Ratings

Note: The absolute maximum ratings are stress ratings only. The device might not function or be operable above

the operating conditions given in section 1.2. Stresses exceeding the absolute maximum ratings might also

damage the device. In addition, extended exposure to stresses above the recommended operating conditions

might affect device reliability. IDT does not recommend designing to the “Absolute Maximum Ratings.”

Parameter Symbol Conditions Min Max Unit

Analog Supply Voltage V

-0.3 6.0 V

Voltages at Analog I/O – In Pin V

INA

-0.3 VDD+0.3 V

Voltages at Analog I/O – Out Pin V

OUTA

-0.3 VDD+0.3 V

Storage Temperature Range T

STG

-50 150 °C

Storage Temperature Range T

STG <10h

For periods < 10 hours -50 170 °C

Note: Also see Table 6.1 regarding soldering temperature and storage conditions for the SOP-8 package.

1.2. Recommended Operating Conditions

Parameter Symbol Conditions Min Typ Max Unit

Analog Supply Voltage to Ground V

2.7 5.0 5.5 V

Analog Supply Voltage (with external

JFET Regulator)

SUPP

5.5 7 30 V

Common Mode Voltage V

1 V

DDA

- 1.3

Ambient Temperature Range

1, 2)

AMB

-50 150

°C

External Capacitance between V

and

Ground

VDD

100 220 470 nF

Output Load Resistance to V

L,OUT

2.5 10

kΩ

Output Load Resistance to V

3) 4)

L,OUT

2.5 20

kΩ

Output Load Capacitance

L,OUT

1 10 15 nF

Bridge Resistance

0.2 100

kΩ

Power ON Rise Time t

PON

100 ms

Note that the maximum EEPROM programming temperature is 85°C.

If buying die, designers should use caution not to exceed maximum junction temperature by proper package selection.

When using the output for digital

calibration, no pull down resistor is allowed.

For loads less than 20 kΩ to VSS an equivalent strength (or lower) pull-up resistor must be added.

Using the output for digital calibration, C

L,OUT

is limited by the maximum rise time T

ZAC,rise

Note: Minimum bridge resistance is only a factor if using the Bsink feature. The nominal R

(ON) of the Bsink transistor is 10 Ω when

operating at V

= 5 V, and 15 Ω when operating at V

= 3.0 V. This does give rise to a ratiometricity inaccuracy that becomes greater

with low bridge resistances.

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ZSC31010CEG1-T

Mfr. #:

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Sensor Interface Sensor Signal Conditoner

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ZSC31010CEG1-T

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