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LPC2361FBD100,551

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P65
LPC2361_62 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5.1 — 15 October 2013 10 of 65
NXP Semiconductors
LPC2361/62
Single-chip 16-bit/32-bit MCU
P1[30]/V
BUS
/AD0[4] 21
[2]
I/O P1[30] — General purpose digital input/output pin.
I V
BUS
— Monitors the presence of USB bus power.
Note: This signal must be HIGH for USB reset to occur.
I AD0[4] — A/D converter 0, input 4.
P1[31]/SCK1/AD0[5] 20
[2]
I/O P1[31] — General purpose digital input/output pin.
I/O SCK1 — Serial Clock for SSP1.
I AD0[5] — A/D converter 0, input 5.
P2[0] to P2[31] I/O Port 2: Port 2 is a 32-bit I/O port with individual direction controls for each bit. The
operation of port 2 pins depends upon the pin function selected via the pin
connect block. Pins 14 through 31 of this port are not available.
P2[0]/PWM1[1]/
TXD1/TRACECLK
75
[1]
I/O P2[0] — General purpose digital input/output pin.
O PWM1[1] — Pulse Width Modulator 1, channel 1 output.
O TXD1 — Transmitter output for UART1.
O TRACECLK — Trace Clock.
P2[1]/PWM1[2]/
RXD1/PIPESTAT0
74
[1]
I/O P2[1] — General purpose digital input/output pin.
O PWM1[2] — Pulse Width Modulator 1, channel 2 output.
I RXD1 — Receiver input for UART1.
O PIPESTAT0 — Pipeline Status, bit 0.
P2[2]/PWM1[3]/
CTS1/PIPESTAT1
73
[1]
I/O P2[2] — General purpose digital input/output pin.
O PWM1[3] — Pulse Width Modulator 1, channel 3 output.
I CTS1 — Clear to Send input for UART1.
O PIPESTAT1 — Pipeline Status, bit 1.
P2[3]/PWM1[4]/
DCD1/PIPESTAT2
70
[1]
I/O P2[3] — General purpose digital input/output pin.
O PWM1[4] — Pulse Width Modulator 1, channel 4 output.
I DCD1 — Data Carrier Detect input for UART1.
O PIPESTAT2 — Pipeline Status, bit 2.
P2[4]/PWM1[5]/
DSR1/TRACESYNC
69
[1]
I/O P2[4] — General purpose digital input/output pin.
O PWM1[5] — Pulse Width Modulator 1, channel 5 output.
I DSR1 — Data Set Ready input for UART1.
O TRACESYNC — Trace Synchronization.
P2[5]/PWM1[6]/
DTR1/TRACEPKT0
68
[1]
I/O P2[5] — General purpose digital input/output pin.
O PWM1[6] — Pulse Width Modulator 1, channel 6 output.
O DTR1 — Data Terminal Ready output for UART1.
O TRACEPKT0 — Trace Packet, bit 0.
P2[6]/PCAP1[0]/RI1/
TRACEPKT1
67
[1]
I/O P2[6] — General purpose digital input/output pin.
I PCAP1[0] — Capture input for PWM1, channel 0.
I RI1 — Ring Indicator input for UART1.
O TRACEPKT1 — Trace Packet, bit 1.
Table 3. Pin description
…continued
Symbol Pin Type Description
LPC2361_62 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5.1 — 15 October 2013 11 of 65
NXP Semiconductors
LPC2361/62
Single-chip 16-bit/32-bit MCU
P2[7]/RD2/RTS1/
TRACEPKT2
66
[1]
I/O P2[7] — General purpose digital input/output pin.
I RD2 — CAN2 receiver input.
O RTS1 — Request to Send output for UART1.
O TRACEPKT2 — Trace Packet, bit 2.
P2[8]/TD2/TXD2/
TRACEPKT3
65
[1]
I/O P2[8] — General purpose digital input/output pin.
O TD2 — CAN2 transmitter output.
O TXD2 — Transmitter output for UART2.
O TRACEPKT3 — Trace Packet, bit 3.
P2[9]/
USB_CONNECT/
RXD2/EXTIN0
64
[1]
I/O P2[9] — General purpose digital input/output pin.
O USB_CONNECT — Signal used to switch an external 1.5 k resistor under
software control. Used with the SoftConnect USB feature.
I RXD2 — Receiver input for UART2.
I EXTIN0 — External Trigger Input.
P2[10]/EINT0
53
[6]
I/O P2[10] — General purpose digital input/output pin.
Note: LOW on this pin while RESET
is LOW forces on-chip bootloader to take
over control of the part after a reset.
I EINT0
— External interrupt 0 input.
P2[11]/EINT1
/
I2STX_CLK
52
[6]
I/O P2[11] — General purpose digital input/output pin.
I EINT1
— External interrupt 1 input.
I/O I2STX_CLK — Transmit Clock. It is driven by the master and received by the
slave. Corresponds to the signal SCK in the I
2
S-bus specification.
P2[12]/EINT2
/
I2STX_WS
51
[6]
I/O P2[12] — General purpose digital input/output pin.
I EINT2
— External interrupt 2 input.
I/O I2STX_WS — Transmit Word Select. It is driven by the master and received by
the slave. Corresponds to the signal WS in the I
2
S-bus specification.
P2[13]/EINT3
/
I2STX_SDA
50
[6]
I/O P2[13] — General purpose digital input/output pin.
I EINT3
— External interrupt 3 input.
I/O I2STX_SDA — Transmit data. It is driven by the transmitter and read by the
receiver. Corresponds to the signal SD in the I
2
S-bus specification.
P3[0] to P3[31] I/O Port 3: Port 3 is a 32-bit I/O port with individual direction controls for each bit. The
operation of port 3 pins depends upon the pin function selected via the pin
connect block. Pins 0 through 24, and 27 through 31 of this port are not available.
P3[25]/MAT0[0]/
PWM1[2]
27
[1]
I/O P3[25] — General purpose digital input/output pin.
O MAT0[0] — Match output for Timer 0, channel 0.
O PWM1[2] — Pulse Width Modulator 1, output 2.
P3[26]/MAT0[1]/
PWM1[3]
26
[1]
I/O P3[26] — General purpose digital input/output pin.
O MAT0[1] — Match output for Timer 0, channel 1.
O PWM1[3] — Pulse Width Modulator 1, output 3.
P4[0] to P4[31] I/O Port 4: Port 4 is a 32-bit I/O port with individual direction controls for each bit. The
operation of port 4 pins depends upon the pin function selected via the pin
connect block. Pins 0 through 27, 30, and 31 of this port are not available.
Table 3. Pin description
…continued
Symbol Pin Type Description
LPC2361_62 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5.1 — 15 October 2013 12 of 65
NXP Semiconductors
LPC2361/62
Single-chip 16-bit/32-bit MCU
[1] 5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis.
[2] 5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a DAC input,
digital section of the pad is disabled.
P4[28]/MAT2[0]/
TXD3
82
[1]
I/O P4[28] — General purpose digital input/output pin.
O MAT2[0] — Match output for Timer 2, channel 0.
O TXD3 — Transmitter output for UART3.
P4[29]/MAT2[1]/
RXD3
85
[1]
I/O P4[29] — General purpose digital input/output pin.
O MAT2[1] — Match output for Timer 2, channel 1.
I RXD3 — Receiver input for UART3.
TDO 1
[1][7]
O TDO — Test Data out for JTAG interface.
TDI 2
[1][8]
I TDI — Test Data in for JTAG interface.
TMS 3
[1][8]
I TMS — Test Mode Select for JTAG interface.
TRST
4
[1][8]
I TRST — Test Reset for JTAG interface.
TCK 5
[1][7]
I TCK — Test Clock for JTAG interface. This clock must be slower than
1
⁄
6
of the
CPU clock (CCLK) for the JTAG interface to operate
RTCK 100
[1][8]
I/O RTCK — JTAG interface control signal.
Note: LOW on this pin while RESET
is LOW enables ETM pins (P2[9:0]) to
operate as trace port after reset.
RSTOUT
14 O RSTOUT — This is a 3.3 V pin. LOW on this pin indicates LPC2361/2362 being in
Reset state.
RESET
17
[9]
I External reset input: A LOW on this pin resets the device, causing I/O ports and
peripherals to take on their default states, and processor execution to begin at
address 0. TTL with hysteresis, 5 V tolerant.
XTAL1 22
[10][11]
I Input to the oscillator circuit and internal clock generator circuits.
XTAL2 23
[10][11]
O Output from the oscillator amplifier.
RTCX1 16
[10][12]
I Input to the RTC oscillator circuit.
RTCX2 18
[10][12]
O Output from the RTC oscillator circuit.
V
SS
15, 31,
41, 55,
72, 97,
83
[13]
I ground: 0 V reference.
V
SSA
11
[14]
I analog ground: 0 V reference. This should nominally be the same voltage as
V
SS
, but should be isolated to minimize noise and error.
V
DD(3V3)
28, 54,
71,
96
[15]
I 3.3 V supply voltage: This is the power supply voltage for the I/O ports.
V
DD(DCDC)(3V3)
13, 42,
84
[16]
I 3.3 V DC-to-DC converter supply voltage: This is the supply voltage for the
on-chip DC-to-DC converter only.
V
DDA
10
[17]
I analog 3.3 V pad supply voltage: This should be nominally the same voltage as
V
DD(3V3)
but should be isolated to minimize noise and error. This voltage is used to
power the ADC and DAC.
VREF 12
[17]
I ADC reference: This should be nominally the same voltage as V
DD(3V3)
but
should be isolated to minimize noise and error. Level on this pin is used as a
reference for ADC and DAC.
VBAT 19
[17]
I RTC power supply: 3.3 V on this pin supplies the power to the RTC peripheral.
Table 3. Pin description
…continued
Symbol Pin Type Description
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P65

LPC2361FBD100,551

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Buy LPC2361FBD100,551
Manufacturer:
NXP Semiconductors
Description:
ARM Microcontrollers - MCU 64K FL/34K RAM USB OTG CAN
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