NCV7718B
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7
ELECTRICAL CHARACTERISTICS (−40°C < T
J
< 150°C, 5.5 V < VSx < 40 V, 3.15 V < V
CC
< 5.25 V, EN = V
CC
, unless otherwise
specified)
Characteristic UnitMaxTypMinConditionsSymbol
BODY DIODE
Power Transistor Body Diode
Forward Voltage
VbdFwd If = 500 mA 0.9 1.3 V
LOGIC INPUTS (EN, SI, SCLK, CSB)
Input Threshold
High
Low
VthInH
VthInL
2.0
0.6
V
Input Hysteresis (SI, SCLK,
CSB)
VthInHys 50 150 300 mV
Enable Hysteresis VthENHys 150 400 800 mV
Input Pull−down Resistance
(EN, SI, SCLK)
Rpdx EN = SI = SCLK = V
CC
50 125 200
kW
Input Pull−up Resistance
(CSB)
RpuCSB CSB = 0 V 50 125 250
kW
Input Capacitance Cinx Not ATE tested −− 15 pF
LOGIC OUTPUT (SO)
Output High
VsoH I
SOURCE
= −1 mA V
CC
0.6
V
Output Low VsoL I
SINK
= 1.6 mA 0.4 V
Tri−state Leakage ItriStLkg CSB = 5 V −5 5
mA
Tri−state Output Capacitance ItriStCout CSB = V
CC
, 0 V < V
CC
< 5.25 V
Not ATE tested
15 pF
NCV7718B
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8
ELECTRICAL CHARACTERISTICS (−40°C < TJ < 150°C, 5.5 V < VSx < 40 V, 3.15 < Vcc < 5.25 V, EN= Vcc, unless otherwise
specified)
Characteristic
Symbol Conditions
Timing
Chart
Min Typ Max Unit
DRIVER OUTPUT TIMING SPECIFICATIONS
High Side Turn On Time
ThsOn
VSx = 13.2 V, R
load
= 39 W
7.5 13
ms
High Side Turn Off Time ThsOff
VSx = 13.2 V, R
load
= 39 W
3.0 6.0
ms
Low Side Turn On Time TlsOn
VSx = 13.2 V, R
load
= 39 W
6.5 13
ms
Low Side Turn Off Time TlsOff
VSx = 13.2 V, R
load
= 39 W
2.0 6.0
ms
High Side Rise Time ThsTr
VSx =13.2 V, R
load
= 39 W
4.0 8.0
ms
High Side Fall Time ThsTf
VSx = 13.2 V, R
load
= 39 W
2.0 4.0
ms
Low Side Rise Time TlsTr
VSx = 13.2 V, R
load
= 39 W
1.0 3.0
ms
Low Side Fall Time TlsTf
VSx = 13.2 V, R
load
= 39 W
1.0 3.0
ms
High Side Off to Low Side On
Non−Overlap Time
ThsOffLsOn
VSx = 13.2 V, R
load
= 39 W
1.5
ms
Low Side Off to High Side On
Non−Overlap Time
TlsOffHsOn
VSx = 13.2 V, R
load
= 39 W
1.5
ms
SERIAL PERIPHERAL INTERFACE
SCLK Frequency
Fclk V
CC
= 5 V
V
CC
= 3.15 V
5.0
2.0
MHz
SCLK Clock Period TpClk V
CC
= 5 V
V
CC
= 3.15 V
200
500
ns
SCLK High Time TclkH 1 85 ns
SCLK Low Time TclkL 2 85 ns
SCLK Setup Time TclkSup 3
4
85
85
ns
SI Setup Time TsiSup 11 50 ns
SI Hold Time TsiH 12 50 ns
CSB Setup Time TcsbSup 5
6
100
100
ns
CSB High Time (Note 4) TcsbH 7 5.0
ms
SO enable after CSB falling
edge
TenSo V
CC
= 5 V 8 200 ns
SO disable after CSB rising
edge
TdisSo V
CC
= 5 V 9 200 ns
SO Rise Time TsoR C
load
= 40 pF
Not ATE tested
10 25 ns
SO Fall Time TsoF C
load
= 40 pF
Not ATE tested
10 25 ns
SO Valid Time TsoV C
load
= 40 pF
SCLK to SO 50%,
Not ATE tested
10 20 50 ns
EN Low Valid Time (Note 5) TenL V
CC
= 5 V
EN going low 50% to
OUTx turing off 50%
10
ms
EN High to SPI Valid TenHspiV 100
ms
SRR Delay Between Two
Consecutive Frame (Note 6)
Tsrr 150
ms
4. This is the minimum time the user must wait between SPI commands.
5. This is the minimum time the user must wait before bringing EN up.
6. This is the minimum time the user must wait to send a SRR command between consecutive frames. If Tsrr time is not met the SRR request
is ignored.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NCV7718B
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9
ELECTRICAL CHARACTERISTIC TIMING DIAGRAMS
LS Turn OFF
HS Turn ON
CSB
90%
90%
10%
10%
90%
TlsOff
TlsTr
ThsTr
TlsOff
HsOn
ThsOn
HS Turn Off
LS Turn On
CSB
90%
90%
10%
10%
90%
ThsOff
TlsOn
TlsTf
ThsTf
ThsOff
LsOn
Figure 4. Detailed Driver Timing

NCV7718BDQR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Motor / Motion / Ignition Controllers & Drivers HALF BRIDGE DRIVER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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