ADSP-21xx
–50–
REV.
TIMING PARAMETERS (ADSP-2103/2162/2164)
SERIAL PORTS
Frequency
10.24 MHz Dependency
Parameter Min Max Min Max Unit
Timing Requirement:
t
SCK
SCLK Period 97.6 t
CK
ns
t
SCS
DR/TFS/RFS Setup before SCLK Low 8 ns
t
SCH
DR/TFS/RFS Hold after SCLK Low 10 ns
t
SCP
SCLK
in
Width 28 ns
Switching Characteristic:
t
CC
CLKOUT High to SCLK
out
24.4 39.4 0.25t
CK
0.25t
CK
+ 15 ns
t
SCDE
SCLK High to DT Enable 0 ns
t
SCDV
SCLK High to DT Valid 28 ns
t
RH
TFS/RFS
out
Hold after SCLK High 0 ns
t
RD
TFS/RFS
out
Delay from SCLK High 28 ns
t
SCDH
DT Hold after SCLK High 0 ns
t
TDE
TFS (alt) to DT Enable 0 ns
t
TDV
TFS (alt) to DT Valid 18 ns
t
SCDD
SCLK High to DT Disable 30 ns
t
RDV
RFS
(Multichannel, Frame Delay Zero) 20 ns
to DT Valid
CLKOUT
SCLK
TFS
RFS
DR
RFS
IN
TFS
IN
DT
( ALTERNATE
FRAME MODE )
t
CC
t
CC
t
SCK
t
SCP
t
SCP
t
SCS
t
SCH
t
RD
t
RH
RFS
OUT
TFS
OUT
t
SCDV
t
SCDE
t
SCDH
t
SCDD
t
TDE
t
TDV
t
RDV
( MULTICHANNEL MODE,
FRAME DELAY 0 {MFD = 0} )
Figure 44. Serial Ports
