Physical layer ST7570
22/26 Doc ID 17526 Rev 2
9.3 Frame structure at physical level
The frame at physical level is compliant with the IEC61334-5-1 and is composed of 45 bytes
(360 bits) as follows:
2 byte preamble (PRE) (AAAAh);
2 byte start subframe delimiter (SSD) (54C7h);
38 byte physical service data unit (P_sdu);
3 byte for pause or alarm;
The bytes are sent from the most significant byte (MSB) to the least significant byte (LSB).
Bits within the byte are packed with the same order (msb to lsb).
Figure 14. Physical frame format
9.4 Frame timing and time-slot synchronization
The IEC61334-5-1 protocol specifies a master-slave network with time-division medium
access: in order to properly communicate, all the nodes belonging to a network must share
the same “slot synchronization”.
The time division is fixed through the use of time-slots, corresponding to a physical frame
length of 45 bytes (i.e. 360 bits) with a total duration equal to:
15 mains cycles, at the 1200 bps operating speed (at 50 Hz);
7.5 mains cycles, at the 2400 bps operating speed (at 50 Hz).
The slot synchronization is first achieved by the master (i.e. ST7570 modem in 'Client'
mode) setting the time-slot starting at the mains zero-crossing instant. The frames
transmitted by the master will enable the slot synchronization of all other slave nodes (i.e.
ST7570 working in 'Server' mode): the reception of the sequence composed by PRE and
SSD will allow all the 'Server' nodes aligning their time-slots to the Client's time-slot.
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ST7570 Package mechanical data
Doc ID 17526 Rev 2 23/26
10 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
The ST7570 is hosted in a 48 pin thermally enhanced very thin fine pitch quad flat package
no lead (VFQFPN) with exposed pad, which allows the device dissipating the heat that is
generated by the operation of the two linear regulators and the power amplifier.
A mechanical drawing of the VFQFPN48 package is included in Figure 15.
Table 9. VFQFPN48 (7 x 7 x 1.0 mm) package mechanical data
Dim.
(mm)
Min. Typ. Max.
A 0.80 0.90 1.00
A1 0.02 0.05
A2 0.65 1.00
A3 0.25
b 0.18 0.23 0.30
D 6.85 7.00 7.15
D2 4.95 5.10 5.25
E 6.85 7.00 7.15
E2 4.95 5.10 5.25
e 0.45 0.50 0.55
L 0.30 0.40 0.50
ddd 0.08
Package mechanical data ST7570
24/26 Doc ID 17526 Rev 2
Figure 15. VFQFPN48 (7 x 7 x 1.0 mm) package outline

ST7570TR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Network Controller & Processor ICs S-FSK Power Line SOC PHY 2.4 kpbs
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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