MAX8819A/MAX8819B/MAX8819C
PMIC with Integrated Chargers and Smart
Power Selector in a 4mm x 4mm TQFN
14 ______________________________________________________________________________________
Pin Description (continued)
PIN NAME FUNCTION
14 CISET
Charge Rate Select Input. Connect a resistor from CISET to GND (R
CISET
) to set the fast-charge
current limit, prequalification-charge current limit, and top-off threshold.
15 CHG
Active-Low, Open-Drain Charge Status Output. CHG pulls low to indicate that the battery is charging.
See Figure 3 for more information.
16 PG1 REG1 Power Ground
17 LX1
Inductor Switching Node for REG1. When enabled, LX1 switches between PV13 and PG1 to regulate
the FB1 voltage to 1.0V. When disabled, LX1 is pulled to PG1 by 1kΩ in shutdown.
18 PV13
Power Input for the REG1 and REG3 Converters. Connect PV13 to SYS. Bypass PV13 to PG1 with a
4.7μF ceramic capacitor.
19 LX3
Inductor Switching Node for REG3. When enabled, LX3 switches between PV13 and PG3 to regulate
the FB3 voltage to 1.0V. When disabled, LX3 is pulled to PG3 by a 1kΩ internal resistor.
20 PG3 REG3 Power Ground
21 DLIM1
Input Current-Limit Selection Digital Input 1. Drive high or low according to Table 1 to set the DC input
current limit.
22 FB2
Feedback Input for REG2. Connect FB2 to the center of a resistor voltage-divider from the REG2
output capacitors to GND to set the output voltage from 1V to V
SYS
. FB2 must be connected to GND if
REG2 is disabled by grounding PV2.
23 FB3
Feedback Input for REG3. Connect FB3 to the center of a resistor voltage-divider from the REG3
output capacitors to GND to set the output voltage from 1V to V
SYS
.
24 EN123
RE G1, RE G2, and RE G3 E nab l e Inp ut. D r i ve E N 123 hi g h to enab l e RE G1, RE G 2, and RE G3. D r i ve E N 123
l ow to d i sab l e RE G 1, RE G2, and RE G 3. The enab l e/d i sab l e seq uenci ng i s show n i n Fi g ur es 6 and 7.
25 PV2
Power Input for REG2. Connect PV2 to SYS for normal operation. Bypass PV2 to PG2 with a 2.2μF
ceramic capacitor. For systems that do not require REG2, connect PV2, FB2, and PG2 to GND (LX2
may be unconnected or connected to GND).
26 LX2
Inductor Switching Node for REG2. When enabled, LX2 switches between PV2 and PG2 to regulate
the FB2 voltage to 1.0V. When disabled, LX2 is pulled to PG2 by a 1kΩ internal resistor.
27 PG2 REG2 Power Ground
28 DLIM2
Input Current-Limit Selection Digital Input 2. Drive high or low according to Table 1 to set the DC input
current limit.
— EP Exposed Pad
