MAX8819A/MAX8819B/MAX8819C
PMIC with Integrated Chargers and Smart
Power Selector in a 4mm x 4mm TQFN
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ELECTRICAL CHARACTERISTICS (continued)
(DC, LX_ unconnected; V
EP
= V
GND
= 0V, V
BAT
= 4V, DLIM[1:2] = 00, EN123 = EN4 = low, V
FB1
= V
FB2
= V
FB3
= 1.1V, V
FB4
= 0.6V,
PV13 = PV2 = SYS, T
A
= -40°C to +85°C, capacitors as shown in Figure 1, R
CISET
= 3kΩ, unless otherwise noted.) (Note 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LED DIMMING CONTROL (EN4)
EN4 Low Shutdown Delay t
SHDN
2 3.2 ms
EN4 High Enable Delay (Figure 8) t
HI_INIT
100 μs
EN4 Low Time t
LO
0.5 500 μs
EN4 High Time t
HI
0.5 μs
RESET (RST1
Reset Trip Threshold V
THRST
Voltage from FB1 to GND, V
FB1
falling,
50mV hysteresis
0.765 0.858 0.945 V
Reset Deassert Delay Time t
DRST
180 200 220 ms
Reset Glitch Filter t
GLRST
50 μs
LOGIC (DLIM1, DLIM2, EN123, EN4, CHG, RST1)
Logic Input-Voltage Low V
DC
= 4.1V to 5.5V, V
SYS
= 2.6V to 5.5V 0.4 V
Logic Input-Voltage High V
DC
= 4.1V to 5.5V, V
SYS
= 2.6V to 5.5V 1.2 V
Logic Input Pulldown Resistance V
LOGIC
= 0.4V to 5.5V, CEN, EN123, EN4 400 760 1200 k
Logic Leakage Current V
LOGIC
= 0 to 5.5V, DLIM1, DLIM2 -1.0 +0.001 +1.0 μA
Logic Output Voltage Low I
SINK
= 1mA 7 15 mV
Logic Output-High Leakage
Current
V
LOGIC
= 5.5V -1.0 +0.001 +1.0 μA
Note 3: Limits are 100% production tested at T
A
= +25°C. Limits over the operating temperature range are guaranteed through cor-
relation using statistical quality control (SQC) methods.
Note 4: The charger transitions from done to fast-charge mode at this BAT recharge threshold.
Note 5: The charger transitions from fast-charge to top-off mode at this top-off threshold (Figure 2).
Note 6: The maximum output current is guaranteed by correlation to the p-channel current-limit threshold, p-channel on-resistance,
n-channel on-resistance, oscillator frequency, input voltage range, and output voltage range. The parameter is stated for
a 4.7μH inductor with 0.13Ω series resistance. See the
Step-Down Converter Maximum Output Current
section for more
information.
Note 7: The step-down output voltages are 1% high with no load due to the load-line architecture.
Note 8: The skip-mode current threshold is the transition point between fixed-frequency PWM operation and skip-mode operation.
The specification is given in terms of output load current for inductor values shown in the typical application circuit (Figure 1).
Note 9: Line regulation for the step-down converters is measured as ΔV
OUT
/ΔD, where D is the duty cycle (approximately
V
OUT
/V
IN
).
Note 10: REG2 is disabled by connecting PV2 to ground, decreasing the quiescent current.
