P89LPC915_916_917_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 15 December 2009 12 of 75
NXP Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
[1] Input/output for P1.0 to P1.4. Input for P1.5.
P1.0/TXD 9 I/O P1.0 — Port 1 bit 0.
O TXD — Transmitter output for serial port.
P1.1/RXD 8 I/O P1.1 — Port 1 bit 1.
I RXD — Receiver input for serial port.
P1.2/T0/SCL 7 I/O P1.2 — Port 1 bit 2 (open-drain when used as output).
I/O T0 — Timer/counter 0 external count input or overflow output (open-drain
when used as output).
I/O SCL — I
2
C serial clock input/output.
P1.3/
INT0/SDA 6 I/O P1.3 — Port 1 bit 3 (open-drain when used as output).
I
INT0 — External interrupt 0 input.
I/O SDA — I
2
C serial data input/output.
P1.4/
INT1 5 I P1.4 — Port 1 bit 4.
I
INT1 — External interrupt 1 input.
P1.5/
RST 3 I P1.5 — Port 1 bit 5 (input only).
I
RST — External Reset input during power-on or if selected via UCFG1.
When functioning as a reset input, a LOW on this pin resets the
microcontroller, causing I/O ports and peripherals to take on their default
states, and the processor begins execution at address 0. Also used
during a power-on sequence to force ISP mode. When using an
oscillator frequency above 12 MHz, the reset input function of P1.5
must be enabled. An external circuit is required to hold the device in
reset at power-up until V
DD
has reached its specified level. When
system power is removed V
DD
will fall below the minimum specified
operating voltage. When using an oscillator frequency above
12 MHz, in some applications, an external brownout detect circuit
may be required to hold the device in reset when V
DD
falls below the
minimum specified operating voltage.
V
SS
4IGround: 0 V reference.
V
DD
10 I Power supply: This is the power supply voltage for normal operation as
well as Idle and Power-down modes.
Table 4. P89LPC915 pin description
…continued
Symbol Pin Type Description
Table 5. P89LPC916 pin description
Symbol Pin Type Description
P0.0 to P0.5 I/O Port 0: Port 0 is an 6-bit I/O port with a user-configurable output type.
During reset Port 0 latches are configured in the input only mode with
the internal pull-up disabled. The operation of Port 0 pins as inputs and
outputs depends upon the port configuration selected. Each port pin is
configured independently. Refer to
Section 8.13.1 “Port configurations”
and
Table 15 “Static characteristics” for details.
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described below:
