P89LPC915_916_917_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 15 December 2009 67 of 75
NXP Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
13. Other characteristics
13.1 Comparator electrical characteristics
[1] This parameter is characterized, but not tested in production.
13.2 ADC electrical characteristics
Table 19. Comparator electrical characteristics
V
DD
= 2.4 V to 3.6 V, unless otherwise specified.
T
amb
=
40
°
C to +85
°
C, or
40
°
C to +125
°
C (see Table 3 on page 3), unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V
IO
input offset voltage - - ±20 mV
V
IC
common mode input voltage 0 - V
DD
0.3 V
CMRR common mode rejection ratio
[1]
--50 dB
t
res(tot)
total response time - 250 500 ns
t
(CE-OV)
chip enable to output valid time - - 10 µs
I
LI
input leakage current 0 < V
I
<V
DD
--±10 µA
Table 20. ADC electrical characteristics
V
DD
= 2.4 V to 3.6 V, unless otherwise specified.
T
amb
=
40
°
C to +85
°
C, or
40
°
C to +125
°
C (see Table 3 on page 3), unless otherwise specified.
All limits valid for an external source impedance of less than 10 k
.
Symbol Parameter Conditions Min Typ Max Unit
V
IA
analog input voltage V
SS
0.2 - V
SS
+ 0.2 V
C
ia
analog input capacitance - - 15 pF
E
D
differential linearity error - - ±1 LSB
E
L(adj)
integral non-linearity - - ±1 LSB
E
O
offset error - - ±2 LSB
E
G
gain error - - ±1%
E
u(tot)
total unadjusted error - - ±2 LSB
M
CTC
channel-to-channel matching - - ±1 LSB
α
ct(port)
crosstalk between port inputs 0 kHz to 100 kHz - - 60 dB
SR
in
input slew rate - - 100 V/ms
T
cy(ADC)
ADC clock cycle 111 - 2000 ns
t
ADC
conversion time A/D enabled - - 13T
cy(ADC)
ns
P89LPC915_916_917_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 15 December 2009 68 of 75
NXP Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
14. Package outline
Fig 30. Package outline SOT27-1 (DIP14)
UNIT
A
max.
1 2
(1) (1)
b
1
cD
(1)
Z
Ee M
H
L
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT27-1
99-12-27
03-02-13
A
min.
A
max.
b
max.
w
M
E
e
1
1.73
1.13
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
0.2542.54 7.62
8.25
7.80
10.0
8.3
2.24.2 0.51 3.2
0.068
0.044
0.021
0.015
0.77
0.73
0.014
0.009
0.26
0.24
0.14
0.12
0.010.1 0.3
0.32
0.31
0.39
0.33
0.0870.17 0.02 0.13
050G04 MO-001 SC-501-14
M
H
c
(e )
1
M
E
A
L
seating plane
A
1
w M
b
1
e
D
A
2
Z
14
1
8
7
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
P89LPC915_916_917_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 15 December 2009 69 of 75
NXP Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
Fig 31. Package outline SOT402-1 (TSSOP14)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2) (1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
0.4
0.3
0.72
0.38
8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT402-1 MO-153
99-12-27
03-02-18
w M
b
p
D
Z
e
0.25
17
14
8
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v M
A
X
A
y
0 2.5 5 mm
scale
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
A
max.
1.1
pin 1 index

P89LPC916FDH,129

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 2KB FLASH 16TSSOP
Lifecycle:
New from this manufacturer.
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