NCP81233
www.onsemi.com
33
Enable and Input UVLO
The NCP81233 is enabled when the voltage at EN pin is
higher than an internal threshold V
EN_TH
= 0.8 V.
A hysteresis can be programmed by an external resistor R
EN
connected to EN pin as shown in Figure 10. The high
threshold V
EN_H
in ENABLE signal is
V
EN_H
+ V
EN_TH
(eq. 1)
Figure 10. Enable and Hysteresis Programming
EN_Int
ENABLE
R
EN
V
EN_TH
V
EN_H
V
EN_L
I
EN_HYS
The low threshold V
EN_L
in ENABLE signal is:
V
EN_L
+ V
EN_TH
* V
EN_HYS
(eq. 2)
The hysteresis V
EN_HYS
is:
V
EN_HYS
+ I
EN_HYS
R
EN
(eq. 3)
A UVLO function for input power supply can be
implemented at EN pin. As shown in Figure 11, the UVLO
threshold can be programmed by two external resistors. The
high threshold V
IN_H
in VIN signal is:
V
IN_H
+
ǒ
R
EN1
R
EN2
) 1
Ǔ
V
EN_TH
(eq. 4)
The low threshold V
IN_L
in VIN signal is:
V
IN_L
+ V
IN_H
* V
IN_HYS
(eq. 5)
The hysteresis V
IN_HYS
is:
V
IN_HYS
+ I
EN_HYS
R
EN1
(eq. 6)
Figure 11. Enable and Input Supply UVLO Circuit
EN_Int
VIN
R
EN1
R
EN2
V
EN_TH
V
IN_H
V
IN_L
I
EN_HYS
To avoid undefined operation, EN pin should not be left
float in applications.
DRVON and DrMOS Power Monitor
The NCP81233 provides comprehensive power up
sequence control including a DrMOS power monitor to
ensure proper operation of DrMOS during power up and
down.
Similar to the UVLO function for input power supply
implemented at EN pin, as shown in Figure 12, the UVLO
threshold for DrMOS power can be programmed by two
external resistors. The high threshold V
DRV_H
in the driver
supply of DrMOS can be programmed as:
V
DRV_H
+
ǒ
R
DRV1
R
DRV2
) 1
Ǔ
V
DRVON_TH
(eq. 7)
The low threshold V
DRV_L
in the driver supply of DrMOS
is:
V
DRV_L
+ V
DRV_H
* V
DRV_HYS
(eq. 8)
The hysteresis V
DRV_HYS
is
V
DRV_HYS
+ I
DRVON_HYS
R
DRV1
(eq. 9)
