NCP81233
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40
second data byte that is written to the register selected by the
address pointer register.
This write byte operation is shown in Figure 20. The
device address is sent over the bus, and then R/
W is set to
0. This is followed by two data bytes. The first data byte is
the address of the internal data register to be written to,
which is stored in the address pointer register. The second
data byte is the data to be written to the internal data register.
The read byte operation is shown in Figure 21. First the
command code needs to be written to the NCP81233 so
that the required data is sent back. This is done by
performing a write to the NCP81233 as before, but only
the data byte containing the register address is sent,
because no data is written to the register. A repeated
start is then issued and a read operation is then
performed consisting of the serial bus address; R/
W bit
set to 1, followed by the data byte read from the data
register.
It is not possible to read or write a data byte from a data
register without first writing to the address pointer
register, even if the address pointer register is already at
the correct value.
In addition to supporting the send byte, the NCP81233
also supports the read byte, write byte, read word and
write word protocols.
Figure 19. Send Byte
D7
D6 D5 D4 D3 D2 D1 D0
E
R
SCL
SDA
START BY
MASTER
ACK. BY
NCP81233
ACK. BY STOP BY
NCP81233 MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
11
000
A1 A0
R/W
1919
FRAME 2
COMMAND CODE
Figure 20. Write Byte
SCL
SDA
START BY
MASTER
ACK. BY
NCP81233
FRAME 1
SERIAL BUS ADDRESS BYTE
11
000
A1 A0
R/W
1919
ACK. BY
NCP81233
FRAME 2
COMMAND CODE
19
ACK. BY
NCP81233
FRAME 3
DATA BYTE
STOP BY
MASTER
SCL (CONTINUED)
SDA (CONTINUED)
D7
D6 D5 D4 D3 D2 D1 D0
D7
D6 D5 D4 D3 D2 D1 D0
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41
Figure 21. Read Byte
D7
D6 D5 D4 D3 D2 D1 D0
SCL
SDA
START BY
MASTER
ACK. BY
NCP81233
ACK. BY
NCP81233
FRAME 1
SERIAL BUS ADDRESS BYTE
11
000
A1 A0
R/W
1919
FRAME 2
COMMAND CODE
D7
D6 D5 D4 D3 D2 D1 D0
SCL
SDA
REPEATED START
BY MASTER
ACK. BY
NCP81233
NO ACK. BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
11
000
A1 A0
R/W
1919
FRAME 2
COMMAND CODE
STOP BY
MASTER
Write Operations
The I
2
C specification defines several protocols for
different types of read and writes operations. The ones used
in the NCP81233 are discussed in this section. The
following abbreviations are used in the diagrams:
S—START
P—STOP
R—READ
W—WRITE
A—ACKNOWLEDGE
A
—NO ACKNOWLEDGE
The NCP81233 uses the following I
2
C write protocols.
Send Byte
In this operation, the master device sends a single
command byte to a slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master asserts a stop condition on SDA and
the transaction ends.
For the NCP81233, the send byte protocol is used to clear
faults. This operation is shown in Figure 22.
Figure 22. Send Byte Command
SLAVE
ADDR ESS
COMMAND
CODE
AWSA P
24
3
1
5 6
If the master is required to read data from the register
immediately after setting up the address, it can assert a repeat
start condition immediately after the final ACK and carry
out a single byte read without asserting an intermediate stop
condition.
Write Byte
In this operation, the master device sends a command byte
and one data byte to the slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master sends a data byte.
7. The slave asserts ACK on SDA.
8. The master asserts a stop condition on SDA and
the transaction ends.
The byte write operation is shown in Figure 23.
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42
Figure 23. Single Byte Write to a Register
SLAVE
ADDRESS
W A
DATA
SAA P
COMMAND
CODE
231567 84
Write Word
In this operation, the master device sends a command byte
and two data bytes to the slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master sends the first data byte.
7. The slave asserts ACK on SDA.
8. The master sends the second data byte.
9. The slave asserts ACK on SDA.
10. The master asserts a stop condition on SDA and
the transaction ends.
The word write operation is shown in Figure 24.
Figure 24. Single Word Write to a Register
SLAVE
ADDRESS
WA
DATA
(LSB)
SAA
COMMAND
CODE
23156784
DATA
(MSB)
AP
910
Block Write
In this operation, the master device sends a command byte
and a byte count followed by the stated number of data bytes
to the slave device as follows:
1. The master device asserts a START condition on
SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserts ACK on SDA.
6. The master sends the byte count N.
7. The slave asserts ACK on SDA.
8. The master sends the first data byte.
9. The slave asserts ACK on SDA.
10. The master sends the second data byte.
11. The slave asserts ACK on SDA.
12. The master sends the remainder of the data byes.
13. The slave asserts an ACK on SDA after each data
byte.
14. After the last data byte the master asserts a STOP
condition on SDA.
Figure 25. Block Write to a Register
SLAVE
ADDRESS
W A
BYTE COUNT
=N
SAA
COMMAND
CODE
23156784
DATA
BYTE 1
A
9
PA
DATA
BYTE N
A
DATA
BYTE 2
10
11
12
13 14
Read Operations
The NCP81233 uses the following I
2
C read protocols.
Read Byte
In this operation, the master device receives a single byte
from a slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code.
5. The slave asserted ACK on SDA.
6. The master sends a repeated start condition on
SDA.
7. The master sends the 7 bit slave address followed
by the read bit (high).
8. The slave asserts ACK on SDA.
9. The slave sends the Data Byte.
10. The master asserts NO ACK on SDA.
11. The master asserts a stop condition on SDA and
the transaction ends.
Figure 26. Single Byte Read to a Register
SLAVE
ADDRESS
W A
SLAVE
ADDRESS
SAA
COMMAND
CODE
23156784
DATA
A P
910
S
11
R
Read Word
In this operation, the master device receives two data
bytes from a slave device as follows:
1. The master device asserts a start condition on
SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. he master sends a command code.
5. The slave asserted ACK on SDA.
6. The master sends a repeated start condition on
SDA.

NCP81233MNTXG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers MULTI-PHASE CONTROLLER WI
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New from this manufacturer.
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