IDT
®
Programmable Timing Control Hub
TM
for Next Gen P4
TM
Processor 0743H—03/15/13
ICS932S208
Programmable Timing Control Hub
TM
for Next Gen P4
TM
Processor
19
MIN MAX MIN MAX
A 2.41 2.80 .095 .110
A1 0.20 0.40 .008 .016
b 0.20 0.34 .008 .0135
c 0.13 0.25 .005 .010
D
E 10.03 10.68 .395 .420
E1 7.40 7.60 .291 .299
e
h 0.38 0.64 .015 .025
L 0.50 1.02 .020 .040
N
a 0°8°0°8°
VARIATIONS
MIN MAX MIN MAX
56 18.31 18.55 .720 .730
10-0034
0.635 BASIC 0.025 BASIC
COMMON DIMENSIONS
In Millimeters In Inches
COMMON DIMENSIONS
Reference Doc.: JEDEC Publication 95, MO-118
N
SEE VARIATIONS SEE VARIATIONS
D mm. D (inch)
SYMBOL
SEE VARIATIONS SEE VARIATIONS
INDEX
AREA
INDEX
AREA
1 2
N
D
h x 45°
E1
E
α
SEATING
PLANE
SEATING
PLANE
A1
A
e
- C -
b
.10 (.004) C
.10 (.004) C
c
L
SSOP Package Drawing and Dimensions
IDT
®
Programmable Timing Control Hub
TM
for Next Gen P4
TM
Processor 0743H—03/15/13
ICS932S208
Programmable Timing Control Hub
TM
for Next Gen P4
TM
Processor
20
MIN MAX MIN MAX
A -- 1.20 -- .047
A1 0.05 0.15 .002 .006
A2 0.80 1.05 .032 .041
b 0.17 0.27 .007 .011
c 0.09 0.20 .0035 .008
D
E
E1 6.00 6.20 .236 .244
e
L 0.45 0.75 .018 .030
N
aaa -- 0.10 -- .004
VARIATIONS
MIN MAX MIN MAX
56 13.90 14.10 .547 .555
10-0039
N
D mm. D (inch)
Reference Doc.: JEDEC Publication 95, MO-153
0.50 BASIC 0.020 BASIC
SEE VARIATIONS SEE VARIATIONS
SEE VARIATIONS SEE VARIATIONS
8.10 BASIC 0.319 BASIC
6.10 mm. Body, 0.50 mm. Pitch TSSOP
(240 mil) (20 mil)
SYMBOL
In Millimeters In Inches
COMMON DIMENSIONS COMMON DIMENSIONS
INDEX
AREA
INDEX
AREA
12
1 2
N
D
E1
E
a
SEATING
PLANE
SEATING
PLANE
A1
A
A2
e
-C-
- C -
b
c
L
aaa C
TSSOP Package Drawing and Dimensions
Ordering Information
Part / Order Number Shipping Packaging Package Temperature
932S208DFLF Tubes 56-pin SSOP 0 to +70° C
932S208DFLFT Tape and Reel 56-pin SSOP 0 to +70° C
932S208DGLN Tubes 56-pin TSSOP 0 to +70° C
932S208DGLNT Tape and Reel 56-pin TSSOP 0 to +70° C
932S208DGLF Tubes 56-pin TSSOP 0 to +70° C
932S208DGLFT Tape and Reel 56-pin TSSOP 0 to +70° C
"LF" or "LN" suffix are the Annealed Pb-Free configuration, RoHS compliant.
"D" is the device revision designator (will not correlate to with the datasheet revision).
ICS932S208
Programmable Timing Control Hub
TM
for Next Gen P4
TM
Processor
21
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© 2013 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, ICS, and the IDT logo are trademarks
of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks
are or may be trademarks or registered trademarks used to identify products or services of their respective owners.
Printed in USA
TM
Revision History
Rev. Issue Date Description Page #
F 12/2/2008 Removed ICS prefix from ordering information 12-20
G 1/26/2010 Updated document template
H 3/15/2013 Updated ordering information 20

932S208DGLFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner SERVER MAIN CLOCK
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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