FOD8316 Rev. 2 14
Figure 2. DESAT Sense to 10% V
O
Delay
(t
DESAT(10%)
) vs. Load Capacitance (C
L
)
Figure 2.
DESAT Sense to 10% V
O
Delay
(t
DESAT(10%)
) vs. Load Resistance (R
L
) Signal Delay (t
RESET(FAULT)
) vs. Temperature
Figure . Under Voltage Lockout
Threshold Delay (W
UVLO
) vs. Temperature
Figure 3. Time to Good Power (T
GP
)
vs. Supply Voltage (V
DD2
)
-40 -20 0 20 40 60 80 100
0.8
1.0
1.2
1.4
1.6
1.8
V
E
- V
SS
= 15 V
V
E
- V
SS
= 0 V
V
DD2
- V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V
R
L
= 10Ω C
L
= 10 nF
t
DESAT(FAULT)
- DESAT SENSE to LOW LEVEL
FAULT SIGNAL DELAY (µs)
T
A
- TEMPERATURE (°C)
0 5 10 15 20 25 30
0
2
4
6
8
10
V
DD2
- V
SS
= 15 V
V
DD2
- V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V
R
L
= 10Ω
t
DESAT(10%)
- DESAT SENSE to 10% V
O
DELAY (µs)
C
L
- LOAD CAPACITANCE (nF)
10 20 30 40 50
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
V
DD2
- V
SS
= 15 V
V
DD2
- V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V
C
L
= 10 nF
t
DESAT(10%)
- DESAT SENSE to 10% V
O
DELAY (µs)
R
L
- LOAD RESISTANCE (
Ω
)
-40 -20 0 20 40 60 80 100
3
4
5
6
7
8
9
V
DD1
= 5.5 V
V
DD1
= 5.0 V
V
DD1
= 4.5 V
V
DD2
- V
SS
= 30 V
V
IN+
= V
DD1
R
L
= 10 Ω C
L
= 10 nF
t
RESET(FAULT)
- RESET TO HIGH LEVEL
FAULT SIGNAL DELAY (µs)
T
A
- TEMPERATURE (°C)
-40 -20 0 20 40 60 80 100
2.0
2.5
3.0
3.5
4.0
4.5
5.0
t
UVLO OFF
t
UVLO ON
V
DD2
- V
SS
= 20 V
V
DD1
= 5 V
V
IN+
= 5 V
f = 50Hz 50% Duty Cycle
t
UVLO
- UNDER VOLTAGE LOCKOUT
THRESHOLD DELAY (µs)
T
A
- TEMPERATURE (°C)
15 20 25 30
0
1
2
3
4
5
V
DD1
= 5 V
V
IN+
= 5 V
f = 50Hz 50% Duty Cycle
t
GP
- TIME TO GOOD POWER (µs)
V
DD2
- SUPPLY VOLTAGE (V)
Figure . RESET
BBBBBBB
to High Level FAULT
Figure 2. DESAT Sense
BBBB
to Low Level FAULT
Signal
Delay (t
DESAT(FAULT)
) vs. Temperature
BBBBBB
Typical Performance Characteristics (Continued)
-40 -20 0 20 40 60 80 100
0
1
2
3
4
5
V
DD2
- V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V
f = 50Hz 50% Duty Cycle
t
GP
- TIME TO GOOD POWER (µs)
T
A
- TEMPERATURE (°C)
Figure 33. Time to Good Power (W
GP
)
vs. Temperature
