© Semiconductor Components Industries, LLC, 2010 www.onsemi.com
FOD8316 Rev. 2 8
FOD8316 — 2.5 A Output Current, IGBT Drive Optocoupler with Desaturation Detection and Isolated Fault Sensing
Notes:
16. This load condition approximates the gate load of a 1200 V / 150 A IGBT.
17. Propagation delay t
PHL
is measured from the 50% level on the falling edge of the input pulse (V
IN+
, V
IN-
) to the 50%
level of the falling edge of the V
O
signal. Refer to Figure 50.
18. Propagation delay t
PLH
is measured from the 50% level on the rising edge of the input pulse (V
IN+
, V
IN-
) to the 50%
level of the rising edge of the V
O
signal. Refer to Figure 50.
19. PWD is defined as | t
PHL
– t
PLH
| for any given device.
20. The difference between t
PHL
and t
PLH
between any two FOD8316 parts under same operating conditions with equal
loads.
21. This is the amount of time the DESAT threshold must be exceeded before V
O
begins to go LOW. This is supply
voltage dependent. See Figure 51.
22. This is the amount of time from when the DESAT threshold is exceeded, until the FAULT output goes LOW.
See Figure 51.
23. The length of time the DESAT threshold must be exceeded before V
O
begins to go LOW, and the FAULT output
b
egins to go LOW. See Figure 51.
24. The length of time from when RESET is asserted LOW, until FAULT output goes HIGH. See Figure 51.
25. The UVLO turn-on delay, t
UVLO
ON
, is measured from V
UVLO+
threshold voltage of the output supply voltage (V
DD2
)
to the 5 V level of the rising edge of the V
O
signal.
26. The UVLO turn-off delay, t
UVLO
OFF
, is measured from V
UVLO–
threshold voltage of the output supply voltage (V
DD2
)
to the 5 V level of the falling edge of the V
O
signal.
27. The time to good power, t
GP
, is measured from 13.5 V level of the rising edge of the output supply voltage (V
DD2
)
to the 5 V level of the rising edge of the V
O
signal.
28. Common-mode transient immunity at output HIGH state is the maximum tolerable negative dVCM/dt on the trailing
edge of the common-mode pulse, V
CM
, to assure the output will remain in HIGH state (i.e., V
O
> 15 V or
FAULT > 2 V).
29.Common-mode transient immunity at output LOW state is the maximum positive tolerable dVCM/dt on the leading
edge of the common-mode pulse, V
CM
, to assure the output will remain in LOW state (i.e., V
O
< 1.0 V or
FAULT < 0.8 V).
t
U
VLO ON
UVLO Turn On Delay
(25)
V
DD2
= 20V in
1.0ms Ramp
4 µs 31, 45
t
UVLO OFF
UVLO Turn Off Delay
(26)
3 µs
t
GP
Time to Good Power
(27)
V
DD2
= 0 to 30V in
10µs Ramp
2.5 µs 32, 33,
45
| CM
H
| Common Mode Transient
Immunity at Output High
T
A
= 25ºC, V
DD1
= 5V,
V
DD2
= 25V,
V
SS
= Ground,
V
CM
= 1500Vpk
(28)
35 50 kV/µs 47, 48
| CM
L
| Common Mode Transient
Immunity at Output Low
T
A
= 25ºC, V
DD1
= 5V,
V
DD2
= 25V,
V
SS
= Ground,
V
CM
= 1500Vpk
(29)
35 50 kV/µs 46, 49
Symbol Parameter Conditions Min. Typ. Max. Units
Figure
Switching Characteristics (Continued)
Apply over all recommended conditions, typical value is measured at V
DD1
= 5 V, V
DD2
– V
SS
= 30 V, V
E
– V
SS
= 0 V,
and T
A
= 25°C; unless otherwise specified.
