© Semiconductor Components Industries, LLC, 2010 www.onsemi.com
FOD8316 Rev. 2 23
FOD8316 — 2.5 A Output Current, IGBT Drive Optocoupler with Desaturation Detection and Isolated Fault Sensing
2. Gate Driver Output
A pair of PMOS and NMOS transistors made up the
output driver stage, which facilitates close to rail-to-rail
output swing. This feature allows a tight control of gate
voltage during on-state and short circuit condition. The
output driver is typically capable of sinking 2 A and
sourcing 2 A at room temperature. Due to the low
RDS
(ON)
of the MOSFETs, the power dissipation is
reduced as compared to those bipolar-type driver output
stages. The absolute maximum rating of the output peak
current, I
O(PEAK)
is 3 A, thus the careful selection of the
g
ate resistor, Rg, is required to limit the short circuit
current of the IGBT.
As shown in Figure 53, the gate driver output is influ-
enced by signals from the photodetector circuitry, the
UVLO comparator, and the DESAT signals. Under no
fault condition, normal operation resumes while the
supply voltage is above the UVLO threshold, the output
of the photodetector will drive the MOSFETs of the
output stage.
The logic circuitry of the output stage will ensure that the
push-pull devices will never be turned “ON” simultane-
ously. When the output of the photodetector is HIGH, the
output, V
O
will be pulled to HIGH state by turning on the
PMOS. When the output of the photodetector is LOW,
V
O
will be pulled to LOW state by turning on the NMOS.
When V
DD2
supply goes below V
UVLO
, which is the
designated ULVO threshold at the comparator, V
O
will
be pulled down to LOW state regardless of photo-
detector output.
When desaturation is detected, V
O
will turn off slowly as
i
t is pulled low by the 1XNMOS device, the input to the
Fault Sense circuitry will be latched to HIGH state and
turns on the LED. When V
O
goes below 2 V, the
50XNMOS device turns on again, clamping the IGBT
gate firmly to V
SS
. The Fault Sense signal will remain
latched in the HIGH state until the LED of the gate driver
circuitry turns off.
3. Desaturation Protection, FAULT Output
Desaturation detection protection ensures the protection
of the IGBT at short circuit by monitoring the collector-
emitter voltage of the IGBT in the half bridge. When the
DESAT voltage goes up and reaches above the
threshold voltage, a short circuit condition is detected
and the driver output stage will execute a “soft” IGBT
turn-off and will be eventually driven low. This sequence
is illustrated in Figure 55. The FAULT open-drain output
is triggered active low to report a desaturation error. It
could only be cleared by activating active low by the
external controller to the RESET input.
The DESAT fault detector should be disabled for a short
time period (blanking time) before the IGBT turns on to
allow the collector voltage to fall below DESAT thresh-
old. This blanking period protects against false trigger of
the DESAT while the IGBT is turning on.
4. “Soft” Turn-Off
The soft turn-off feature ensures the safe turn off of the
IGBT under fault condition. This reduces the voltage
spike on the collector of the IGBT. Without this, the IGBT
would see a heavy spike on the collector, resulting in a
permanent damage to the device when it’s turned off
immediately.
5. Under Voltage Lockout (UVLO)
Under voltage detection prevents the application of
insufficient gate voltage to the IGBT. This could be
dangerous, as it would drive the IGBT out of saturation
and into the linear operation where the losses are very
high and quickly overheats. This feature ensures proper
operating of the IGBTs. The output voltage, V
O
, remains
L
OW irregardless of the inputs, as long as the supply
voltage, V
DD2
– V
E
, is less than V
ULVO+
. When the
supply voltage falls below V
ULVO-
, V
O
goes LOW, as
illustrated in Figure 56.
6. Time to Good Power
At initial power up, the LED is off and the output of the
gate driver should be in the LOW or OFF state.
Sometimes race conditions exist that cause the output to
follow V
D
(assuming V
DD2
and V
E
are connected
externally), until all of the circuits in the output IC have
stabilized. This condition can result in output transitions
or transients that are coupled to the driven IGBT. These
transients can cause the high- and low-side IGBTs to
conduct shoot-through current that can damage power
semiconductor devices.
ON has introduced an initial turn-on delay, called “time
to good power”. This delay, typically 2.5 µs, is only
present during the initial power-up of the device. Once
powered, the “time to good power” delay is determined
by the delay of the UVLO circuitry. If the LED is ON
during the initial turn-on activation, low-to-high transition
at the output of the gate driver will only occur 2.5 µs after
the V
DD2
power is applied.
7
. Dual Supply Operation – Negative Bias at V
SS
The IGBT’s off-state noise immunity can be enhanced by
providing a negative gate-to-emitter bias when the IGBT
is in the OFF state. This static off-state bias can be
supplied by connecting a separate negative voltage
source between the V
E
(pin 16) and V
SS
(pin 9 &10).
Figure 53 illustrates the two distinct grounds. The
primary ground reference is the IGBT’s emitter
connection. V
E
(pin 16). The under-voltage threshold
and desaturation voltage detection are referenced to the
IGBT’s emitter (V
E
) ground.
The recommended application circuit, Figure 52, shows
the interconnection of the V
DD2
and V
E
supplies. The
IGBT’s gate to emitter voltage is the absolute value sum
of the V
DD2
supply and the V
SS
reverse bias. The
n
egative voltage supply at V
SS
appears at the gate drive
input, V
O
, when the FOD8316 is in the LOW state.
When the input drives the output high, the output
voltage, V
O
, will have the potential of the V
DD2
and V
SS
.
